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Difference between revisions of "intel/cpuid"
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Below is a list of '''Intel's {{x86|CPUID}}''' broken down by their respective core names and [[microarchitecture]]: | Below is a list of '''Intel's {{x86|CPUID}}''' broken down by their respective core names and [[microarchitecture]]: | ||
− | + | == CPUIDs== | |
{{work-in-progress}} | {{work-in-progress}} | ||
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| {{intel|Cannon Lake|l=arch}} || {{intel|Cannon Lake U|U|l=core}} || 0 || 0x6 || 0x6 || 0x6 || [[Family 6 Model 102]] | | {{intel|Cannon Lake|l=arch}} || {{intel|Cannon Lake U|U|l=core}} || 0 || 0x6 || 0x6 || 0x6 || [[Family 6 Model 102]] | ||
|- | |- | ||
− | | {{intel|Coffee Lake|l=arch}} || {{intel|Coffee Lake S|S|l=core}} | + | | {{intel|Coffee Lake|l=arch}} || {{intel|Coffee Lake S|S|l=core}}, {{intel|Coffee Lake H|H|l=core}} || 0 || 0x6 || 0x9 || 0xE || [[Family 6 Model 158]] |
|- | |- | ||
− | | rowspan="2" | {{intel|Kaby Lake|l=arch}} || {{intel|Kaby Lake DT|DT|l=core}} | + | | rowspan="2" | {{intel|Kaby Lake|l=arch}} || {{intel|Kaby Lake DT|DT|l=core}}, {{intel|Kaby Lake H|H|l=core}}, {{intel|Kaby Lake S|S|l=core}}, {{intel|Kaby Lake X|X|l=core}} || 0 || 0x6 || 0x9 || 0xE || [[Family 6 Model 158]] |
|- | |- | ||
− | | {{intel|Kaby Lake Y|Y|l=core}} | + | | {{intel|Kaby Lake Y|Y|l=core}}, {{intel|Kaby Lake U|U|l=core}} || 0 || 0x6 || 0x8 || 0xE || [[Family 6 Model 142]] |
|- | |- | ||
− | | rowspan="2" | {{intel|Skylake (Client)|l=arch}} || {{intel|Skylake DT|DT|l=core}} | + | | rowspan="2" | {{intel|Skylake (Client)|l=arch}} || {{intel|Skylake DT|DT|l=core}}, {{intel|Skylake H|H|l=core}}, {{intel|Skylake S|S|l=core}} || 0 || 0x6 || 0x5 || 0xE || [[Family 6 Model 94]] |
|- | |- | ||
− | | {{intel|Skylake Y|Y|l=core}} | + | | {{intel|Skylake Y|Y|l=core}}, {{intel|Skylake U|U|l=core}} || 0 || 0x6 || 0x4 || 0xE || [[Family 6 Model 78]] |
|- | |- | ||
| rowspan="3" | {{intel|Broadwell (Client)|l=arch}} || {{intel|Broadwell D|D|l=core}} || 0 || 0x6 || 0x5 || 0x6 || [[Family 6 Model 86]] | | rowspan="3" | {{intel|Broadwell (Client)|l=arch}} || {{intel|Broadwell D|D|l=core}} || 0 || 0x6 || 0x5 || 0x6 || [[Family 6 Model 86]] | ||
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| {{intel|Haswell S|S|l=core}} || 0 || 0x6 || 0x3 || 0xC || [[Family 6 Model 60]] | | {{intel|Haswell S|S|l=core}} || 0 || 0x6 || 0x3 || 0xC || [[Family 6 Model 60]] | ||
|- | |- | ||
− | | {{intel|Ivy Bridge (Client)|l=arch}} || {{intel|Ivy Bridge M|M|l=core}} | + | | {{intel|Ivy Bridge (Client)|l=arch}} || {{intel|Ivy Bridge M|M|l=core}}, {{intel|Ivy Bridge H|H|l=core}} || 0 || 0x6 || 0x3 || 0xA || [[Family 6 Model 58]] |
|- | |- | ||
− | | {{intel|Sandy Bridge (Client)|l=arch}} || {{intel|Sandy Bridge M|M|l=core}} | + | | {{intel|Sandy Bridge (Client)|l=arch}} || {{intel|Sandy Bridge M|M|l=core}}, {{intel|Sandy Bridge H|H|l=core}} || 0 || 0x6 || 0x2 || 0xA || [[Family 6 Model 42]] |
|- | |- | ||
| colspan="7" style="text-align: center;" | <small>[[Big Cores]] (Server)</small> | | colspan="7" style="text-align: center;" | <small>[[Big Cores]] (Server)</small> | ||
|- | |- | ||
− | | {{intel|Skylake (Server)|l=arch}} || {{intel|Skylake X|X|l=core}} | + | | {{intel|Skylake (Server)|l=arch}} || {{intel|Skylake X|X|l=core}}, {{intel|Skylake SP|SP|l=core}} || 0 || 0x6 || 0x5 || 0x5 || [[Family 6 Model 85]] |
|- | |- | ||
| {{intel|Broadwell (Server)|l=arch}} || {{intel|Broadwell E|E|l=core}} || 0 || 0x6 || 0x4 || 0xF || [[Family 6 Model 79]] | | {{intel|Broadwell (Server)|l=arch}} || {{intel|Broadwell E|E|l=core}} || 0 || 0x6 || 0x4 || 0xF || [[Family 6 Model 79]] | ||
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|- | |- | ||
| {{intel|Apollo Lake|l=core}} || 0 || 0x6 || 0x5 || 0xC || [[Family 6 Model 92]] | | {{intel|Apollo Lake|l=core}} || 0 || 0x6 || 0x5 || 0xC || [[Family 6 Model 92]] | ||
+ | |- | ||
+ | | {{intel|Airmont|l=arch}} || {{intel|Cherry Trail|l=core}}, {{intel|Braswell|l=core}} || 0 || 0x6 || 0x4 || 0xC || [[Family 6 Model 76]] | ||
+ | |- | ||
+ | | rowspan="5" | {{intel|Silvermont|l=arch}} || {{intel|SoFIA|l=core}} || 0 || 0x6 || 0x5 || 0xD || [[Family 6 Model 93]] | ||
+ | |- | ||
+ | | {{intel|Anniedle|l=core}} || 0 || 0x6 || 0x5 || 0xA || [[Family 6 Model 90]] | ||
+ | |- | ||
+ | | {{intel|Avoton|l=core}}, {{intel|Rangeley|l=core}} || 0 || 0x6 || 0x4 || 0xD || [[Family 6 Model 77]] | ||
+ | |- | ||
+ | | {{intel|Tangier|l=core}} || 0 || 0x6 || 0x4 || 0xA || [[Family 6 Model 74]] | ||
+ | |- | ||
+ | | {{intel|Bay Trail|l=core}} || 0 || 0x6 || 0x3 || 0x7 || [[Family 6 Model 55]] | ||
+ | |- | ||
+ | | {{intel|Saltwell|l=arch}} | ||
+ | |- | ||
+ | | {{intel|Bonnell|l=arch}} || {{intel|Silverthorne|l=core}}, {{intel|Diamondville|l=core}} || 0 || 0x6 || 0x1 || 0xC || [[Family 6 Model 28]] | ||
|- | |- | ||
| colspan="7" style="text-align: center;" | <small>{{intel|MIC Architecture}}</small> | | colspan="7" style="text-align: center;" | <small>{{intel|MIC Architecture}}</small> |
Revision as of 22:22, 28 January 2018
Below is a list of Intel's CPUID broken down by their respective core names and microarchitecture: