From WikiChip
Difference between revisions of "amd/k6-iii-p/amd-k6-iii-450ack"
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== Features == | == Features == | ||
{{x86 features | {{x86 features | ||
− | | mmx | + | |real=No |
− | | emmx | + | |protected=No |
− | | 3dnow | + | |smm=No |
− | | e3dnow | + | |fpu=No |
+ | |x8616=No | ||
+ | |x8632=No | ||
+ | |x8664=No | ||
+ | |nx=No | ||
+ | |mmx=Yes | ||
+ | |emmx=No | ||
+ | |sse=No | ||
+ | |sse2=No | ||
+ | |sse3=No | ||
+ | |ssse3=No | ||
+ | |sse41=No | ||
+ | |sse42=No | ||
+ | |sse4a=No | ||
+ | |avx=No | ||
+ | |avx2=No | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=No | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=Yes | ||
+ | |e3dnow=Yes | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
}} | }} | ||
* Auto-power down state | * Auto-power down state | ||
* Stop clock state | * Stop clock state | ||
* Halt state | * Halt state |
Latest revision as of 19:10, 27 October 2018
Edit Values | |
AMD-K6-III/450ACK | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | AMD-K6-III/450ACK |
Part Number | AMD-K6-III/450ACK |
Market | Mobile |
Introduction | September 20, 1999 (announced) September 20, 1999 (launched) |
Shop | Amazon |
General Specs | |
Family | K6-III-P |
Series | K6-III Mobile |
Frequency | 449.99 MHz |
Bus type | FSB |
Bus speed | 99.99 MHz |
Bus rate | 99.99 MT/s |
Clock multiplier | 4.5 |
CPUID | 591 |
Microarchitecture | |
Microarchitecture | K6-III |
Platform | Super 7 |
Core Name | Sharptooth |
Core Family | 5 |
Core Model | 9 |
Core Stepping | 1 |
Process | 0.25 µm |
Transistors | 21,300,000 |
Technology | CMOS |
Die | 118 mm² |
Word Size | 32 bit |
Cores | 1 |
Threads | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 16 W |
Vcore | 2.0 V ± 0.1 V |
VI/O | 3.3675 V ± 7% |
Tcase | 0 °C – 80 °C |
Tstorage | -65 °C – 150 °C |
AMD-K6-III/450ACK is a 32-bit x86 mobile microprocessor designed by AMD and introduced in late 1999. This MPU which was manufactured on a 0.25 µm process, based on K6-III microarchitecture, operated at 450 MHz with a bus of 100 MHz. This MPU dissipated a maximum of 16 W with a typical power dissipation of 12.6 W.
Cache[edit]
- Main article: K6-III § Cache
L3$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L3$ is off-chip. L2$ operated at full core speed.
Cache Info [Edit Values] | ||
L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
L2$ | 256 KiB 0.25 MiB 262,144 B 2.441406e-4 GiB |
1x256 KiB 4-way set associative (shared) |
Graphics[edit]
This SoC has no integrated graphics processing unit.
Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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- Auto-power down state
- Stop clock state
- Halt state
Facts about "AMD-K6-III/450ACK - AMD"
base frequency | 449.99 MHz (0.45 GHz, 449,990 kHz) + |
bus rate | 99.99 MT/s (0.1 GT/s, 99,990 kT/s) + |
bus speed | 99.99 MHz (0.1 GHz, 99,990 kHz) + |
bus type | FSB + |
clock multiplier | 4.5 + |
core count | 1 + |
core family | 5 + |
core model | 9 + |
core name | Sharptooth + |
core stepping | 1 + |
core voltage | 2 V (20 dV, 200 cV, 2,000 mV) + |
core voltage tolerance | 0.1 V + |
cpuid | 591 + |
designer | AMD + |
die area | 118 mm² (0.183 in², 1.18 cm², 118,000,000 µm²) + |
family | K6-III-P + |
first announced | September 20, 1999 + |
first launched | September 20, 1999 + |
full page name | amd/k6-iii-p/amd-k6-iii-450ack + |
instance of | microprocessor + |
io voltage | 3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) + |
io voltage tolerance | 7% + |
l1d$ description | 2-way set associative + |
l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
ldate | September 20, 1999 + |
manufacturer | AMD + |
market segment | Mobile + |
max case temperature | 353.15 K (80 °C, 176 °F, 635.67 °R) + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max storage temperature | 423.15 K (150 °C, 302 °F, 761.67 °R) + |
microarchitecture | K6-III + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
model number | AMD-K6-III/450ACK + |
name | AMD-K6-III/450ACK + |
part number | AMD-K6-III/450ACK + |
platform | Super 7 + |
power dissipation | 16 W (16,000 mW, 0.0215 hp, 0.016 kW) + |
process | 250 nm (0.25 μm, 2.5e-4 mm) + |
series | K6-III Mobile + |
smp max ways | 1 + |
technology | CMOS + |
thread count | 1 + |
transistor count | 21,300,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |