From WikiChip
Difference between revisions of "amd/duron/dhd1000amt1b"
< amd‎ | duron

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{{amd title|Duron 1000 (Morgan)}}
 
{{amd title|Duron 1000 (Morgan)}}
{{chip
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{{mpu
 
| name                = Duron 1000
 
| name                = Duron 1000
 
| no image            = Yes
 
| no image            = Yes
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== Features ==  
 
== Features ==  
{{chip features
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{{mpu features
 
| em64t      =  
 
| em64t      =  
 
| nx          =  
 
| nx          =  

Revision as of 14:36, 13 December 2017

Template:mpu The Duron 1000 based on the Morgan core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 1000 MHz with a bus capable of 200 MT/s with a max TDP of 46.1 W and a typical TDP of 42.4 W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Halt State
  • Sleep State

Documents

DataSheet

Other

See also

has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +