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Difference between revisions of "Template:risc-v isa main"

 
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* {{risc-v|list of processor families|Families}}
 
* {{risc-v|list of processor families|Families}}
 
<div class="header">Base Variants<small style="float: right;">({{risc-v|i|base}})</small></div>
 
<div class="header">Base Variants<small style="float: right;">({{risc-v|i|base}})</small></div>
* {{risc-v|RV32I}}
+
* {{risc-v|RV32}}
* {{risc-v|RV32E}}
+
* {{risc-v|RV64}}
* {{risc-v|RV64I}}
+
* {{risc-v|RV128}}
* {{risc-v|RV128I}}
 
 
<div class="header">Standard Extensions<small style="float: right;">({{risc-v|Standard Extensions|all}})</small></div>
 
<div class="header">Standard Extensions<small style="float: right;">({{risc-v|Standard Extensions|all}})</small></div>
 
<div class="wiki-ul-col3">
 
<div class="wiki-ul-col3">
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* {{risc-v|C}}
 
* {{risc-v|C}}
 
* {{risc-v|D}}
 
* {{risc-v|D}}
 +
* {{risc-v|E}}
 
* {{risc-v|F}}
 
* {{risc-v|F}}
 
* {{risc-v|G}}
 
* {{risc-v|G}}

Latest revision as of 02:37, 12 December 2017

RISC-V
Instruction Set Architecture
General
Base Variants(base)
Standard Extensions(all)
Topics

v · d · e