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Difference between revisions of "intel/pentium silver/n5000"
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'''Pentium Silver N5000''' is a [[quad-core]] {{arch|64}} [[x86]] mobile microprocessor introduced by [[Intel]] in 2017. This processor is based on {{intel|Goldmont Plus|l=arch}} microarchitecture and is manufactured on a [[14 nm]] process. The N5000 operates at 1.1 GHz with a burst frequency of 2.7 GHz and a TDP of 6 W. This MPU incorporates Intel's {{intel|HD Graphics 605}} [[GPU]] operating at 200 MHz with a burst frequency of 750 MHz. | '''Pentium Silver N5000''' is a [[quad-core]] {{arch|64}} [[x86]] mobile microprocessor introduced by [[Intel]] in 2017. This processor is based on {{intel|Goldmont Plus|l=arch}} microarchitecture and is manufactured on a [[14 nm]] process. The N5000 operates at 1.1 GHz with a burst frequency of 2.7 GHz and a TDP of 6 W. This MPU incorporates Intel's {{intel|HD Graphics 605}} [[GPU]] operating at 200 MHz with a burst frequency of 750 MHz. | ||
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+ | {{unknown features}} | ||
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+ | == Cache == | ||
+ | {{main|intel/microarchitectures/goldmont_plus#Memory_Hierarchy|l1=Goldmont Plus § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=256 KiB | ||
+ | |l1i cache=128 KiB | ||
+ | |l1i break=4x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1d cache=96 KiB | ||
+ | |l1d break=4x24 KiB | ||
+ | |l1d desc=6-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=4 MiB | ||
+ | |l2 break=2x2 MiB | ||
+ | |l2 desc=16-way set associative | ||
+ | |l2 policy=write-back | ||
+ | }} |
Revision as of 11:33, 11 December 2017
Edit Values | |||||||
Pentium Silver N5000 | |||||||
General Info | |||||||
Designer | Intel | ||||||
Manufacturer | Intel | ||||||
Model Number | N5000 | ||||||
Part Number | FH8068003067406 | ||||||
S-Spec | SR3RZ | ||||||
Market | Mobile | ||||||
Introduction | December 11, 2017 (announced) December 11, 2017 (launched) | ||||||
Release Price | $161.00 | ||||||
Shop | Amazon | ||||||
General Specs | |||||||
Family | Pentium Silver | ||||||
Series | 5000 | ||||||
Locked | Yes | ||||||
Frequency | 1,100 MHz | ||||||
Turbo Frequency | 2,700 MHz (1 core) | ||||||
Clock multiplier | 11 | ||||||
Microarchitecture | |||||||
ISA | x86-64 (x86) | ||||||
Microarchitecture | Goldmont Plus | ||||||
Core Name | Gemini Lake | ||||||
Core Stepping | B0 | ||||||
Process | 14 nm | ||||||
Technology | CMOS | ||||||
Word Size | 64 bit | ||||||
Cores | 4 | ||||||
Threads | 4 | ||||||
Max Memory | 8 GiB | ||||||
Multiprocessing | |||||||
Max SMP | 1-Way (Uniprocessor) | ||||||
Electrical | |||||||
SDP | 4.8 W | ||||||
TDP | 6 W | ||||||
Packaging | |||||||
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Pentium Silver N5000 is a quad-core 64-bit x86 mobile microprocessor introduced by Intel in 2017. This processor is based on Goldmont Plus microarchitecture and is manufactured on a 14 nm process. The N5000 operates at 1.1 GHz with a burst frequency of 2.7 GHz and a TDP of 6 W. This MPU incorporates Intel's HD Graphics 605 GPU operating at 200 MHz with a burst frequency of 750 MHz.
Cache
- Main article: Goldmont Plus § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Pentium Silver N5000 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Pentium Silver N5000 - Intel#package + |
base frequency | 1,100 MHz (1.1 GHz, 1,100,000 kHz) + |
clock multiplier | 11 + |
core count | 4 + |
core name | Gemini Lake + |
core stepping | B0 + |
designer | Intel + |
family | Pentium Silver + |
first announced | December 11, 2017 + |
first launched | December 11, 2017 + |
full page name | intel/pentium silver/n5000 + |
has locked clock multiplier | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 96 KiB (98,304 B, 0.0938 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | December 11, 2017 + |
main image | + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
microarchitecture | Goldmont Plus + |
model number | N5000 + |
name | Pentium Silver N5000 + |
package | FCBGA-1090 + |
part number | FH8068003067406 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 161.00 (€ 144.90, £ 130.41, ¥ 16,636.13) + |
s-spec | SR3RZ + |
sdp | 4.8 W (4,800 mW, 0.00644 hp, 0.0048 kW) + |
series | 5000 + |
smp max ways | 1 + |
tdp | 6 W (6,000 mW, 0.00805 hp, 0.006 kW) + |
technology | CMOS + |
thread count | 4 + |
turbo frequency (1 core) | 2,700 MHz (2.7 GHz, 2,700,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |