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Difference between revisions of "intel/loihi"
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The chip is named after the Loihi as a play-on-words - [[wikipedia:Lōʻihi Seamount|Loihi]] is an emerging Hawaiian submarine volcano that is set to surface one day.
 
The chip is named after the Loihi as a play-on-words - [[wikipedia:Lōʻihi Seamount|Loihi]] is an emerging Hawaiian submarine volcano that is set to surface one day.
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== Overview ==
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Announced in September 2017, Loihi is predominantly a research chip meaning performance characteristics are not guaranteed. Loihi consists of a asynchronous [[spiking neural network]] (SNN) meaning instead of manipulating signals, the chip sends spikes along activate synapses. Connections are asynchronous and highly timed based. Neuromorphic cores containing many neurons are interlinked and receive spikes from elsewhere in the network. When received spikes accumulate for a certain period of time and reach a set threshold, the core will fire off its own spikes to its connected neurons. Preceding spikes reinforce each other and the neuron connections while spikes that follows will inhibit the connection, declining the connectivity until all activities are halted.
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=== architecture ===
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The chip itself implements of a fully asynchronous [[many-core]] [[mesh topology|mesh]] of 128 neuromorphic cores. The network supports a wide variety of [[artificial neural network]] such as [[recurrent neural network|RNNs]], [[sparse neural network|SNN]], sparse, hierarchical, and various other topologies where each neuron in the chip is capable of communicating with 1000s of other neurons.
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There are 128 neuromorphic cores, each containing a "learning engine" that can be programmed to adopt to the network parameters during operation such as the spike timings and their impact. This makes the chip more flexible as it allows various paradigms such as supervisor/non-supervisor and reinforcing/reconfigurablity without requiring any particular approach. The choice for higher flexibility is intentional in order to defer various architectural decisions that could be detrimental to research.
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The chip was initially tested and simulated using FPGAs. Actual silicon implementations arrived in late November. Loihi is fabricated on Intel's [[14 nm process]] and has a total of 130,000 artificial neurons and 130 million synapses.
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=== Floorplan ===
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* [[14 nm process]]
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:[[File:loihi floorplan.png|600px]]
  
 
== References ==
 
== References ==
 
* Jim Held, Intel Fellow & Director Emerging Technologies Research, Intel Labs, HPC Developer Conference 2017 ("Leading The Evolution of Compute: Neuromorphic and Quantum Computing").
 
* Jim Held, Intel Fellow & Director Emerging Technologies Research, Intel Labs, HPC Developer Conference 2017 ("Leading The Evolution of Compute: Neuromorphic and Quantum Computing").

Revision as of 02:04, 29 November 2017

Edit Values
Loihi
General Info
DesignerIntel
ManufacturerIntel
MarketArtificial Intelligence
IntroductionSeptember 25, 2017 (announced)
ShopAmazon
Microarchitecture
Process14 nm

Loihi (pronounced low-ee-hee) is a neuromorphic research test chip designed by Intel Labs that uses a asynchronous spiking neural network (SNN) to implement adaptive self-modifying event-driven fine-grained parallel computations used to implement learning and inference with high efficiency.

The chip is named after the Loihi as a play-on-words - Loihi is an emerging Hawaiian submarine volcano that is set to surface one day.

Overview

Announced in September 2017, Loihi is predominantly a research chip meaning performance characteristics are not guaranteed. Loihi consists of a asynchronous spiking neural network (SNN) meaning instead of manipulating signals, the chip sends spikes along activate synapses. Connections are asynchronous and highly timed based. Neuromorphic cores containing many neurons are interlinked and receive spikes from elsewhere in the network. When received spikes accumulate for a certain period of time and reach a set threshold, the core will fire off its own spikes to its connected neurons. Preceding spikes reinforce each other and the neuron connections while spikes that follows will inhibit the connection, declining the connectivity until all activities are halted.

architecture

The chip itself implements of a fully asynchronous many-core mesh of 128 neuromorphic cores. The network supports a wide variety of artificial neural network such as RNNs, SNN, sparse, hierarchical, and various other topologies where each neuron in the chip is capable of communicating with 1000s of other neurons.

There are 128 neuromorphic cores, each containing a "learning engine" that can be programmed to adopt to the network parameters during operation such as the spike timings and their impact. This makes the chip more flexible as it allows various paradigms such as supervisor/non-supervisor and reinforcing/reconfigurablity without requiring any particular approach. The choice for higher flexibility is intentional in order to defer various architectural decisions that could be detrimental to research.

The chip was initially tested and simulated using FPGAs. Actual silicon implementations arrived in late November. Loihi is fabricated on Intel's 14 nm process and has a total of 130,000 artificial neurons and 130 million synapses.

Floorplan

loihi floorplan.png

References

  • Jim Held, Intel Fellow & Director Emerging Technologies Research, Intel Labs, HPC Developer Conference 2017 ("Leading The Evolution of Compute: Neuromorphic and Quantum Computing").
Facts about "Loihi - Intel"
designerIntel +
first announcedSeptember 25, 2017 +
full page nameintel/loihi +
instance ofneuromorphic chip +
ldateSeptember 25, 2017 +
manufacturerIntel +
market segmentArtificial Intelligence +
nameLoihi +
process14 nm (0.014 μm, 1.4e-5 mm) +