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Difference between revisions of "sun microsystems/ultrasparc/stp1030bga-200"
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+ | == Documents == | ||
+ | === Datasheets === | ||
+ | * [[:File:stp1030a.pdf|UltraSPARC-I High-Performance, 167 & 200 MHz, 64-bit RISC Processor Datasheet]], October 1996 |
Revision as of 08:49, 28 November 2017
Template:mpu UltraSPARC-I 200MHz was a 64-bit SPARC microprocessor designed and introduced by Sun Microsystems in 1996.
Cache
- Main article: UltraSPARC-I § Cache
In addition to the on-chip cache, this chip also required an external cache that is either 512 KiB, 1 MiB, 2 MiB, or 4 MiB with a line size of 64 bytes.
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Documents
Datasheets
Facts about "UltraSPARC-I 200MHz - Sun Microsystems"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | UltraSPARC-I 200MHz - Sun Microsystems#package + |
base frequency | 200 MHz (0.2 GHz, 200,000 kHz) + |
core count | 1 + |
core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
designer | Sun Microsystems + |
die area | 310 mm² (0.481 in², 3.1 cm², 310,000,000 µm²) + |
family | UltraSPARC + |
first announced | 1996 + |
first launched | 1996 + |
full page name | sun microsystems/ultrasparc/stp1030bga-200 + |
instance of | microprocessor + |
isa | SPARC V9 + |
isa family | SPARC + |
l1$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1d$ description | 16-way set associative + |
l1d$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
ldate | 1996 + |
main image | + |
manufacturer | Texas Instruments + |
market segment | Server + and Workstation + |
microarchitecture | UltraSPARC-I + |
model number | UltraSPARC-I 200MHz + |
name | UltraSPARC-I 200MHz + |
package | BGA-521 + |
part number | STP103OBGA-200 + |
process | 500 nm (0.5 μm, 5.0e-4 mm) + |
series | UltraSPARC-I + |
technology | CMOS + |
thread count | 1 + |
transistor count | 5,200,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |