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Difference between revisions of "sun microsystems/ultrasparc/stp1030bga-200"
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== Documents ==
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=== Datasheets ===
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* [[:File:stp1030a.pdf|UltraSPARC-I High-Performance, 167 & 200 MHz, 64-bit RISC Processor Datasheet]], October 1996

Revision as of 08:49, 28 November 2017

Template:mpu UltraSPARC-I 200MHz was a 64-bit SPARC microprocessor designed and introduced by Sun Microsystems in 1996.

Cache

Main article: UltraSPARC-I § Cache

In addition to the on-chip cache, this chip also required an external cache that is either 512 KiB, 1 MiB, 2 MiB, or 4 MiB with a line size of 64 bytes.

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$32 KiB
32,768 B
0.0313 MiB
L1I$16 KiB
16,384 B
0.0156 MiB
1x16 KiB2-way set associative 
L1D$16 KiB
16,384 B
0.0156 MiB
1x16 KiB16-way set associativewrite-through

Documents

Datasheets

Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
UltraSPARC-I 200MHz - Sun Microsystems#package +
base frequency200 MHz (0.2 GHz, 200,000 kHz) +
core count1 +
core voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
designerSun Microsystems +
die area310 mm² (0.481 in², 3.1 cm², 310,000,000 µm²) +
familyUltraSPARC +
first announced1996 +
first launched1996 +
full page namesun microsystems/ultrasparc/stp1030bga-200 +
instance ofmicroprocessor +
isaSPARC V9 +
isa familySPARC +
l1$ size32 KiB (32,768 B, 0.0313 MiB) +
l1d$ description16-way set associative +
l1d$ size16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description2-way set associative +
l1i$ size16 KiB (16,384 B, 0.0156 MiB) +
ldate1996 +
main imageFile:Ic-photo-Sun--STP1030ABGA-200--(UltraSPARC-CPU).JPG +
manufacturerTexas Instruments +
market segmentServer + and Workstation +
microarchitectureUltraSPARC-I +
model numberUltraSPARC-I 200MHz +
nameUltraSPARC-I 200MHz +
packageBGA-521 +
part numberSTP103OBGA-200 +
process500 nm (0.5 μm, 5.0e-4 mm) +
seriesUltraSPARC-I +
technologyCMOS +
thread count1 +
transistor count5,200,000 +
word size64 bit (8 octets, 16 nibbles) +