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Difference between revisions of "intel/microarchitectures/knights hill"
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'''Knights Hill''' was [[Intel]]'s planned successor to {{\\|Knights Landing}}, a [[10 nm]] [[many-core]] microarchitecture for research and supercomputers.
 
'''Knights Hill''' was [[Intel]]'s planned successor to {{\\|Knights Landing}}, a [[10 nm]] [[many-core]] microarchitecture for research and supercomputers.
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== History ==
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== Brands ==
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Knights Hill was branded as 3rd generation {{intel|Xeon Phi}}
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== Process Technology ==
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Knights Hill was intended to be fabricated on Intel's [[10 nm process]].
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== Architecture ==
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Intel released very few architectural details regarding Knights Hill.
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=== Key changes from {{\\|Knights Landing}} ===
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* [[10 nm]] (from [[14 nm]])
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* 2nd Generation {{intel|Omni-Path|Omni-Path Architecture}}

Revision as of 18:12, 16 November 2017

Edit Values
Knights Hill µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Process10 nm
Succession

Knights Hill was Intel's planned successor to Knights Landing, a 10 nm many-core microarchitecture for research and supercomputers.

History

Brands

Knights Hill was branded as 3rd generation Xeon Phi

Process Technology

Knights Hill was intended to be fabricated on Intel's 10 nm process.

Architecture

Intel released very few architectural details regarding Knights Hill.

Key changes from Knights Landing

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Facts about "Knights Hill - Microarchitectures - Intel"
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codenameKnights Hill +
designerIntel +
full page nameintel/microarchitectures/knights hill +
instance ofmicroarchitecture +
instruction set architecturex86-16 +, x86-32 + and x86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameKnights Hill +
process10 nm (0.01 μm, 1.0e-5 mm) +