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Difference between revisions of "intel/microarchitectures/netburst (client)"
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|phase-out=April, 2006 | |phase-out=April, 2006 | ||
|process=180 nm | |process=180 nm | ||
| + | |isa=x86-16 | ||
| + | |isa 2=x86-32 | ||
| + | |||
|predecessor=P6 | |predecessor=P6 | ||
|predecessor link=intel/microarchitectures/p6 | |predecessor link=intel/microarchitectures/p6 | ||
Revision as of 18:26, 30 November 2017
| Edit Values | |
| NetBurst µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | November 20, 2000 |
| Phase-out | April, 2006 |
| Process | 180 nm |
| Instructions | |
| ISA | x86-16, x86-32 |
| Succession | |
NetBurst (also P68) was the microarchitecture for Intel's 180 nm process for desktops and servers as a successor to P6. NetBurst was replaced by the Core microarchitecture in early 2006.
Facts about "NetBurst - Microarchitectures - Intel"
| codename | NetBurst + |
| designer | Intel + |
| first launched | November 20, 2000 + |
| full page name | intel/microarchitectures/netburst (client) + |
| instance of | microarchitecture + |
| instruction set architecture | x86-32 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | NetBurst + |
| phase-out | April 2006 + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) +, 130 nm (0.13 μm, 1.3e-4 mm) + and 90 nm (0.09 μm, 9.0e-5 mm) + |