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'''Celeron 807UE''' is a [[single-core]] budget mobile embedded [[x86]] microprocessor introduced by [[Intel]] in mid-[[2012]]. The Celeron 807UE, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1 GHz with an ultra-low [[TDP]] of just 10 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 350 MHz with a bust frequency of 800 MHz.
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'''Celeron 807UE''' is a [[single-core]] budget mobile embedded [[x86]] microprocessor introduced by [[Intel]] in mid-[[2012]]. The Celeron 807UE, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1 GHz with an ultra-low [[TDP]] of just 10 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 350 MHz with a bust frequency of 800 MHz. This processor supports 4 GiB of single-channel DDR3-1333 ECC memory.
  
 
== Cache ==
 
== Cache ==

Revision as of 04:03, 20 August 2017

Template:mpu Celeron 807UE is a single-core budget mobile embedded x86 microprocessor introduced by Intel in mid-2012. The Celeron 807UE, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1 GHz with an ultra-low TDP of just 10 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 350 MHz with a bust frequency of 800 MHz. This processor supports 4 GiB of single-channel DDR3-1333 ECC memory.

Cache

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$64 KiB
65,536 B
0.0625 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associative 
L1D$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associativewrite-back
L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x256 KiB8-way set associativewrite-back
L3$1.5 MiB
1,536 KiB
1,572,864 B
0.00146 GiB
  1x1.5 MiB12-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333, DDR3-1066
Supports ECCYes
Max Mem4 GiB
Controllers1
Channels1
Max Bandwidth9.93 GiB/s
10,168.32 MiB/s
10.662 GB/s
10,662.256 MB/s
0.0097 TiB/s
0.0107 TB/s
Bandwidth
Single 9.93 GiB/s

Expansions

[Edit/Modify Expansions Info]

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Expansion Options
PCIeRevision: 2.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Graphics

[Edit/Modify IGP Info]

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Integrated Graphics Information
GPUHD Graphics (Sandy Bridge)
DesignerIntelDevice ID0x0106
Execution Units6Max Displays2
Frequency350 MHz
0.35 GHz
350,000 KHz
Burst Frequency800 MHz
0.8 GHz
800,000 KHz
OutputDP, eDP, HDMI, SDVO, CRT
Standards
DirectX10.1
OpenGL3.1
DP1.1
eDP1.1
HDMI1.4
Additional Features
Intel Flexible Display Interface (FDI)

Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
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Facts about "Celeron 807UE - Intel"
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Celeron 807UE - Intel#pcie +
device id0x0106 +
has ecc memory supporttrue +
integrated gpuHD Graphics (Sandy Bridge) +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units6 +
integrated gpu max frequency800 MHz (0.8 GHz, 800,000 KHz) +
l1$ size64 KiB (65,536 B, 0.0625 MiB) +
l1d$ description8-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description8-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description8-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l3$ description12-way set associative +
l3$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
max memory bandwidth9.93 GiB/s (10,168.32 MiB/s, 10.662 GB/s, 10,662.256 MB/s, 0.0097 TiB/s, 0.0107 TB/s) +
max memory channels1 +
supported memory typeDDR3-1333 + and DDR3-1066 +