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From WikiChip
Difference between revisions of "intel/celeron/827"
| Line 32: | Line 32: | ||
|core stepping=J1 | |core stepping=J1 | ||
|process=32 nm | |process=32 nm | ||
| + | |transistors=504,000,000 | ||
|technology=CMOS | |technology=CMOS | ||
| + | |die area=131 mm² | ||
|word size=64 bit | |word size=64 bit | ||
|core count=1 | |core count=1 | ||
Revision as of 05:24, 19 August 2017
Cache
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Supported x86 Extensions & Processor Features
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