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Difference between revisions of "intel/atom/c3508"
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|image=denverton (front).png | |image=denverton (front).png |
Revision as of 15:14, 13 December 2017
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Atom C3508 | |||||||||||
General Info | |||||||||||
Designer | Intel | ||||||||||
Manufacturer | Intel | ||||||||||
Model Number | C3508 | ||||||||||
Part Number | HW8076503693501 | ||||||||||
S-Spec | SR3JX | ||||||||||
Market | Server, Embedded | ||||||||||
Introduction | August 15, 2017 (announced) August 15, 2017 (launched) | ||||||||||
Shop | Amazon | ||||||||||
General Specs | |||||||||||
Family | Atom | ||||||||||
Series | 3000 | ||||||||||
Locked | Yes | ||||||||||
Frequency | 1,600 MHz | ||||||||||
Clock multiplier | 16 | ||||||||||
Microarchitecture | |||||||||||
ISA | x86-64 (x86) | ||||||||||
Microarchitecture | Goldmont | ||||||||||
Core Name | Denverton | ||||||||||
Core Family | 6 | ||||||||||
Core Model | 95 | ||||||||||
Core Stepping | B1 | ||||||||||
Process | 14 nm | ||||||||||
Technology | CMOS | ||||||||||
Word Size | 64 bit | ||||||||||
Cores | 4 | ||||||||||
Threads | 4 | ||||||||||
Max Memory | 256 GiB | ||||||||||
Multiprocessing | |||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||
Electrical | |||||||||||
TDP | 11.25 W | ||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||
Tcase | 0 °C – 90 °C | ||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||
Tambient | -40 °C – 85 °C | ||||||||||
Packaging | |||||||||||
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Atom C3508 is a 64-bit quad-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3508, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 1.6 GHz with a TDP of 11.25 W. The C3508 supports up to 256 GiB of dual-channel DDR4-1866 ECC memory. This model is part of Denverton's Internet of Things and eTEMP SKUs which come with integrated QuickAssist Technology and support extended ambient operating temperature (-40 °C to 85 °C).
Cache
- Main article: Goldmont § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
This chip incorporates 8 high-speed I/O (HSIO) lanes that may be configured as any combination of the following:
Expansion Options |
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Networking
Networking
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Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- Intel's Integrated QuickAssist Technology supports a rate of up to 5 Gbps.
Facts about "Atom C3508 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Atom C3508 - Intel#package + and Atom C3508 - Intel#pcie + |
base frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
clock multiplier | 16 + |
core count | 4 + |
core family | 6 + |
core model | 95 + |
core name | Denverton + |
core stepping | B1 + |
designer | Intel + |
family | Atom + |
first announced | August 15, 2017 + |
first launched | August 15, 2017 + |
full page name | intel/atom/c3508 + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions + and Integrated QuickAssist Technology + |
has integrated intel quickassist technology | true + |
has intel enhanced speedstep technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 224 KiB (229,376 B, 0.219 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 96 KiB (98,304 B, 0.0938 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
ldate | August 15, 2017 + |
main image | + |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max ambient temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
max case temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max cpu count | 1 + |
max hsio lanes | 8 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 262,144 MiB (268,435,456 KiB, 274,877,906,944 B, 256 GiB, 0.25 TiB) + |
max memory bandwidth | 27.82 GiB/s (28,487.68 MiB/s, 29.871 GB/s, 29,871.498 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
max memory channels | 2 + |
max sata ports | 8 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
max usb ports | 8 + |
microarchitecture | Goldmont + |
min ambient temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | C3508 + |
name | Atom C3508 + |
package | FCBGA-1310 + |
part number | HW8076503693501 + |
part of | Internet of Things and eTEMP SKUs + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
s-spec | SR3JX + |
series | 3000 + |
smp max ways | 1 + |
supported memory type | DDR3L-1600 + and DDR4-1866 + |
tdp | 11.25 W (11,250 mW, 0.0151 hp, 0.0113 kW) + |
technology | CMOS + |
thread count | 4 + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |