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Difference between revisions of "intel/atom/c3955"
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'''Atom C3955''' is a {{arch|64}} [[hexadeca-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3955, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 2.1 GHz with a [[TDP]] of 32 W and a {{intel|turbo boost}} frequency of up to 2.4 GHz. The C3955 supports up to a dual-channel of 256 GiB of DDR4-2400 [[ECC]] memory.

Revision as of 20:39, 15 August 2017

Template:mpu Atom C3955 is a 64-bit hexadeca-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3955, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 2.1 GHz with a TDP of 32 W and a turbo boost frequency of up to 2.4 GHz. The C3955 supports up to a dual-channel of 256 GiB of DDR4-2400 ECC memory.

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