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Difference between revisions of "intel/cores/sandy bridge e"
(Created page with "{{intel title|Sandy Bridge E|core}} {{core}}") |
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{{intel title|Sandy Bridge E|core}} | {{intel title|Sandy Bridge E|core}} | ||
− | {{core}} | + | {{core |
+ | |name=Sandy Bridge E | ||
+ | |image=sandy bridge e (front).png | ||
+ | |caption=Package front | ||
+ | |image 2=sandy bridge e (back).png | ||
+ | |caption 2=Package back | ||
+ | |developer=Intel | ||
+ | |manufacturer=Intel | ||
+ | |first announced=November 14, 2011 | ||
+ | |first launched=November 14, 2011 | ||
+ | |isa=x86-64 | ||
+ | |isa family=x86 | ||
+ | |microarch=Sandy Bridge | ||
+ | |word=64 bit | ||
+ | |proc=32 nm | ||
+ | |tech=CMOS | ||
+ | |predecessor=Gulftown | ||
+ | |predecessor link=intel/cores/gulftown | ||
+ | |successor=Ivy Bridge E | ||
+ | |successor link=intel/cores/ivy bridge e | ||
+ | }} |
Latest revision as of 21:01, 24 July 2017
Edit Values | |
Sandy Bridge E | |
Package front | |
Package back | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Introduction | November 14, 2011 (announced) November 14, 2011 (launched) |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Sandy Bridge |
Word Size | 8 octets 64 bit16 nibbles |
Process | 32 nm 0.032 μm 3.2e-5 mm |
Technology | CMOS |
Succession | |
Facts about "Sandy Bridge E - Cores - Intel"
designer | Intel + |
first announced | November 14, 2011 + |
first launched | November 14, 2011 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | + and + |
main image caption | Package front + and Package back + |
manufacturer | Intel + |
microarchitecture | Sandy Bridge + |
name | Sandy Bridge E + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |