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Difference between revisions of "intel/xeon platinum/8160t"
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|part number=CD8067303592800 | |part number=CD8067303592800 | ||
|s-spec=SR3J6 | |s-spec=SR3J6 | ||
+ | |s-spec qs=QMS3 | ||
|market=Server | |market=Server | ||
|first announced=April 25, 2017 | |first announced=April 25, 2017 | ||
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|turbo frequency1=3,700 MHz | |turbo frequency1=3,700 MHz | ||
|clock multiplier=21 | |clock multiplier=21 | ||
+ | |cpuid=0x50654 | ||
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 |
Revision as of 01:26, 18 July 2017
Template:mpu Xeon Platinum 8160T is a 64-bit 24-core x86 multi-socket highest performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8160T, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.1 GHz with a TDP of 150 W and a turbo boost frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options
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Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Frequencies
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||||||||||||||||||
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1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | ||
Normal | 2,100 MHz | 3,700 MHz | 3,700 MHz | 3,500 MHz | 3,500 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,200 MHz | 3,200 MHz | 3,200 MHz | 3,200 MHz | 3,000 MHz | 3,000 MHz | 3,000 MHz | 3,000 MHz | 2,800 MHz | 2,800 MHz | 2,800 MHz | 2,800 MHz |
AVX2 | 1,800 MHz | 3,600 MHz | 3,600 MHz | 3,400 MHz | 3,400 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,200 MHz | 3,200 MHz | 3,200 MHz | 3,200 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,600 MHz | 2,600 MHz | 2,600 MHz | 2,600 MHz | 2,500 MHz | 2,500 MHz | 2,500 MHz | 2,500 MHz |
AVX512 | 1,400 MHz | 3,500 MHz | 3,500 MHz | 3,300 MHz | 3,300 MHz | 3,000 MHz | 3,000 MHz | 3,000 MHz | 3,000 MHz | 2,600 MHz | 2,600 MHz | 2,600 MHz | 2,600 MHz | 2,300 MHz | 2,300 MHz | 2,300 MHz | 2,300 MHz | 2,100 MHz | 2,100 MHz | 2,100 MHz | 2,100 MHz | 2,000 MHz | 2,000 MHz | 2,000 MHz | 2,000 MHz |
Facts about "Xeon Platinum 8160T - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8160T - Intel#io + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 33 MiB (33,792 KiB, 34,603,008 B, 0.0322 GiB) + |
max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + |
max memory channels | 6 + |
max pcie lanes | 48 + |
supported memory type | DDR4-2666 + |