From WikiChip
Difference between revisions of "intel/xeon platinum"
< intel

(→‎See also)
Line 30: Line 30:
 
'''Xeon Platinum''' is a family of {{arch|64}} [[x86]] multi-socket multi-core highest performance server microprocessors introduced by [[Intel]] in 2017. The Xeon Platinum series offers the highest performance, highest scalability, and highest flexibility.  
 
'''Xeon Platinum''' is a family of {{arch|64}} [[x86]] multi-socket multi-core highest performance server microprocessors introduced by [[Intel]] in 2017. The Xeon Platinum series offers the highest performance, highest scalability, and highest flexibility.  
  
−
{{clear}}
+
== Overview ==
 +
{{empty section}}
 +
 
 
== Members ==
 
== Members ==
 
=== Skylake ===
 
=== Skylake ===
 
{{see also|intel/microarchitectures/skylake|l1=Skylake µarch}}
 
{{see also|intel/microarchitectures/skylake|l1=Skylake µarch}}
 +
Introduced in July 2017, the {{intel|Skylake|l=arch}}-based Xeon Platinum microprocessors support eight-way [[multiprocessing]] with up to [[28 cores]] and 56 threads. Additionally, all Xeon Platinum processors support:
 +
 +
* '''TDP:''' 105 W - 205 W
 +
* '''Mem:''' 768 GiB hexa-channel DDR4-2133 ECC memory.
 +
** ''M'' versions support 1.5 TiB per socket
 +
* '''I/O:''' 48 PCIe 3 lanes
 +
* '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL)
 +
* '''Features:''' {{intel|Hyper-Threading}}, {{intel|Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
 +
 +
All Xeon Platinum processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 3 {{intel|Ultra Path Interconnect}} (UPI) links.
 +
 
<!-- NOTE:  
 
<!-- NOTE:  
 
           This table is generated automatically from the data in the actual articles.
 
           This table is generated automatically from the data in the actual articles.
Line 42: Line 55:
 
-->
 
-->
 
{{comp table start}}
 
{{comp table start}}
−
<table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22">
+
<table class="comptable sortable tc4 tc5">
 
<tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Skylake-based Xeon Platinum Processors</th></tr>
 
<tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Skylake-based Xeon Platinum Processors</th></tr>
−
<tr class="comptable-header"><th>&nbsp;</th><th colspan="8">Main processor</th></tr>
+
<tr class="comptable-header"><th>&nbsp;</th><th colspan="7">Main processor</th><th colspan="2">Cache</th><th colspan="2">Memory</th></tr>
−
{{comp table header 1|cols=Price, Process, Launched, C, T, Freq, TDP, Max Mem}}
+
{{comp table header 1|cols=Price, Launched, Cores, Threads, Frequency, Max Turbo, %TDP, L2$, L3$, Mem Type, Max Mem}}
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Platinum]] [[microarchitecture::Skylake]]
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Platinum]] [[microarchitecture::Skylake]]
 
  |?full page name
 
  |?full page name
 
  |?model number
 
  |?model number
 
  |?release price
 
  |?release price
−
|?process
 
 
  |?first launched
 
  |?first launched
 
  |?core count
 
  |?core count
 
  |?thread count
 
  |?thread count
 
  |?base frequency#GHz
 
  |?base frequency#GHz
 +
|?turbo frequency (1 core)#GHz
 
  |?tdp
 
  |?tdp
 +
|?l2$ size
 +
|?l3$ size
 +
|?supported memory type
 
  |?max memory#GiB
 
  |?max memory#GiB
 
  |format=template
 
  |format=template
 
  |template=proc table 3
 
  |template=proc table 3
−
  |userparam=10
+
  |userparam=13
 
  |mainlabel=-
 
  |mainlabel=-
 
}}
 
}}
Line 65: Line 81:
 
</table>
 
</table>
 
{{comp table end}}
 
{{comp table end}}
 +
  
 
== See also ==
 
== See also ==

Revision as of 03:34, 12 July 2017

Xeon Platinum
xeon platinum (2017).png
Xeon Platinum Logo
Developer Intel
Manufacturer Intel
Type Microprocessors
Introduction May 4, 2017 (announced)
H2, 2017 (launch)
Architecture x86 server multiprocessors
ISA x86-64
µarch Skylake
Word size 64 bit
8 octets
16 nibbles
Process 14 nm
0.014 μm
1.4e-5 mm
Technology CMOS
Package FCLGA-3647
Socket LGA-3647
Succession
←
Xeon E7
Xeon E5

Xeon Platinum is a family of 64-bit x86 multi-socket multi-core highest performance server microprocessors introduced by Intel in 2017. The Xeon Platinum series offers the highest performance, highest scalability, and highest flexibility.

Overview

New text document.svg This section is empty; you can help add the missing info by editing this page.

Members

Skylake

See also: Skylake µarch

Introduced in July 2017, the Skylake-based Xeon Platinum microprocessors support eight-way multiprocessing with up to 28 cores and 56 threads. Additionally, all Xeon Platinum processors support:

All Xeon Platinum processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 3 Ultra Path Interconnect (UPI) links.

 List of Skylake-based Xeon Platinum Processors
 Main processorCacheMemory
ModelPriceLaunchedCoresThreadsFrequencyMax TurboTDPL2$L3$Mem TypeMax Mem
Count: 0


See also

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_platinum&oldid=54573"
Facts about "Xeon Platinum - Intel"
RDF feed
designerIntel +
first announcedMay 4, 2017 +
first launchedFebruary 2017 +
full page nameintel/xeon platinum +
instance ofmicroprocessor family +
instruction set architecturex86-64 +
main designerIntel +
manufacturerIntel +
microarchitectureSkylake +
nameXeon Platinum +
packageFCLGA-3647 +
process14 nm (0.014 μm, 1.4e-5 mm) +
socketLGA-3647 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +