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Difference between revisions of "intel/xeon silver/4110"
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'''Xeon Silver 4110''' is a {{arch|64}} [[octa-core]] [[x86]] dual-socket mid-range performance server microprocessor introduced by [[Intel]] in mid-2017. The Silver 4110, which is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]], sports 1 {{x86|AVX-512}} [[FMA]] unit as well as two {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 85 W and a {{intel|turbo boost}} frequency of up to 3 GHz, supports up 768 GiB of hexa-channel DDR4-2400 ECC memory. | '''Xeon Silver 4110''' is a {{arch|64}} [[octa-core]] [[x86]] dual-socket mid-range performance server microprocessor introduced by [[Intel]] in mid-2017. The Silver 4110, which is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]], sports 1 {{x86|AVX-512}} [[FMA]] unit as well as two {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 85 W and a {{intel|turbo boost}} frequency of up to 3 GHz, supports up 768 GiB of hexa-channel DDR4-2400 ECC memory. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=512 KiB | ||
+ | |l1i cache=256 KiB | ||
+ | |l1i break=8x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1d cache=256 KiB | ||
+ | |l1d break=8x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=8 MiB | ||
+ | |l2 break=8x1 MiB | ||
+ | |l2 desc=16-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=11 MiB | ||
+ | |l3 break=8x1.375 MiB | ||
+ | |l3 desc=11-way set associative | ||
+ | |l3 policy=write-back | ||
+ | }} |
Revision as of 17:59, 11 July 2017
Template:mpu Xeon Silver 4110 is a 64-bit octa-core x86 dual-socket mid-range performance server microprocessor introduced by Intel in mid-2017. The Silver 4110, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm process, sports 1 AVX-512 FMA unit as well as two Ultra Path Interconnect links. This microprocessor, which operates at 2.1 GHz with a TDP of 85 W and a turbo boost frequency of up to 3 GHz, supports up 768 GiB of hexa-channel DDR4-2400 ECC memory.
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Xeon Silver 4110 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Silver 4110 - Intel#io + |
base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
chipset | Lewisburg + |
clock multiplier | 21 + |
core count | 8 + |
core family | 6 + |
core name | Skylake SP + |
core stepping | U0 + |
cpuid | 0x50654 + |
designer | Intel + |
family | Xeon Silver + |
first announced | July 11, 2017 + |
first launched | July 11, 2017 + |
full page name | intel/xeon silver/4110 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Transactional Synchronization Extensions +, Extended Page Tables + and Advanced Vector Extensions 512 + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 11 MiB (11,264 KiB, 11,534,336 B, 0.0107 GiB) + |
ldate | July 11, 2017 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 350.15 K (77 °C, 170.6 °F, 630.27 °R) + |
max cpu count | 2 + |
max dts temperature | 90 °C + |
max memory | 786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) + |
max memory bandwidth | 107.3 GiB/s (109,875.2 MiB/s, 115.212 GB/s, 115,212.498 MB/s, 0.105 TiB/s, 0.115 TB/s) + |
max memory channels | 6 + |
max pcie lanes | 48 + |
microarchitecture | Skylake (server) + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min dts temperature | 0 °C + |
model number | 4110 + |
name | Xeon Silver 4110 + |
package | FCLGA-3647 + |
part number | BX806734110 + and CD8067303561400 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 501.00 (€ 450.90, £ 405.81, ¥ 51,768.33) + |
s-spec | SR3GH + |
s-spec (qs) | QN09 + |
series | 4000 + |
smp interconnect | UPI + |
smp interconnect links | 2 + |
smp interconnect rate | 9.6 GT/s + |
smp max ways | 2 + |
socket | Socket P + and LGA-3647 + |
supported memory type | DDR4-2400 + |
tdp | 85 W (85,000 mW, 0.114 hp, 0.085 kW) + |
technology | CMOS + |
thread count | 16 + |
turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |