From WikiChip
Difference between revisions of "intel/core i7/i7-6498du"
(→Expansions) |
|||
Line 165: | Line 165: | ||
|sse42=Yes | |sse42=Yes | ||
|sse4a=No | |sse4a=No | ||
− | |avx= | + | |avx=Yes |
− | |avx2= | + | |avx2=Yes |
|avx512=No | |avx512=No | ||
|abm=Yes | |abm=Yes | ||
Line 172: | Line 172: | ||
|bmi1=Yes | |bmi1=Yes | ||
|bmi2=Yes | |bmi2=Yes | ||
− | |fma3= | + | |fma3=Yes |
|fma4=No | |fma4=No | ||
|aes=Yes | |aes=Yes | ||
Line 182: | Line 182: | ||
|f16c=Yes | |f16c=Yes | ||
|tbt1=No | |tbt1=No | ||
− | |tbt2= | + | |tbt2=Yes |
|tbmt3=No | |tbmt3=No | ||
|bpt=No | |bpt=No | ||
Line 202: | Line 202: | ||
|vtd=Yes | |vtd=Yes | ||
|ept=Yes | |ept=Yes | ||
− | |mpx= | + | |mpx=Yes |
|sgx=Yes | |sgx=Yes | ||
|securekey=Yes | |securekey=Yes | ||
− | |osguard= | + | |osguard=Yes |
|3dnow=No | |3dnow=No | ||
|e3dnow=No | |e3dnow=No |
Revision as of 22:44, 3 July 2017
Template:mpu Core i7-6498DU is a 64-bit dual-core high-end performance x86 mobile microprocessor introduced by Intel in late 2015. Fabricated on a 14 nm process based on the Skylake microarchitecture, this processor operates at 2.5 GHz. The i7-6498DU has a TDP of 15 W with a configurable-down TDP of 7.5 W (800 MHz) and a configurable-up TDP of 25 W (2.6 Ghz). This chip incorporates the HD Graphics 510 GPU operating at 300 MHz with a burst frequency of 1.05 MHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
Cache
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
Memory controller
Integrated Memory Controller
|
||||||||||||||
|
Expansions
Expansion Options
|
||||||||
|
Graphics
Integrated Graphics Information
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
[Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, SHP, MHP | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High | 3840x3840 | |||
VP8 | Unified | Unified | - | 0 | Unified | 1080p | |
VP9 | ✘ | 0 | Unified | 2160p (4K) |
Features
[Edit/Modify Supported Features]
Facts about "Core i7-6498DU - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i7-6498DU - Intel#package + and Core i7-6498DU - Intel#io + |
base frequency | 2,500 MHz (2.5 GHz, 2,500,000 kHz) + |
bus rate | 4,000 MT/s (4 GT/s, 4,000,000 kT/s) + |
bus type | OPI + |
clock multiplier | 25 + |
core count | 2 + |
core family | 6 + |
core model | 78 + |
core name | Skylake U + |
core stepping | D1 + |
core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
core voltage (min) | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | Intel + |
device id | 0x1906 + |
die area | 98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) + |
die count | 2 + |
die length | 10.3 mm (1.03 cm, 0.406 in, 10,300 µm) + |
die width | 9.57 mm (0.957 cm, 0.377 in, 9,570 µm) + |
family | Core i7 + |
first announced | September 1, 2015 + |
first launched | September 27, 2015 + |
full page name | intel/core i7/i7-6498du + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Hyper-Threading Technology +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Secure Key Technology +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology +, Identity Protection Technology +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Turbo Boost Technology 2.0 +, OS Guard +, Extended Page Tables +, Memory Protection Extensions + and Software Guard Extensions + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel identity protection technology support | true + |
has intel my wifi technology support | true + |
has intel secure key technology | true + |
has intel smart response technology support | true + |
has intel supervisor mode execution protection | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics 510 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 12 + |
integrated gpu max frequency | 1,050 MHz (1.05 GHz, 1,050,000 KHz) + |
integrated gpu max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
last order | March 15, 2019 + |
last shipment | September 30, 2019 + |
ldate | September 27, 2015 + |
main image | + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 12 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Skylake + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | i7-6498DU + |
name | Core i7-6498DU + |
package | FCBGA-1356 + |
part number | FJ8066201930413 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 393.00 (€ 353.70, £ 318.33, ¥ 40,608.69) + |
s-spec | SR2NS + |
series | i7-6000 + |
smp max ways | 1 + |
supported memory type | DDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 + |
tdp | 15 W (15,000 mW, 0.0201 hp, 0.015 kW) + |
tdp down | 7.5 W (7,500 mW, 0.0101 hp, 0.0075 kW) + |
tdp down frequency | 800 MHz (0.8 GHz, 800,000 kHz) + |
tdp up | 25 W (25,000 mW, 0.0335 hp, 0.025 kW) + |
tdp up frequency | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
technology | CMOS + |
thread count | 4 + |
transistor count | 1,750,000,000 + |
turbo frequency (1 core) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |