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Revision as of 00:15, 11 July 2017

Template:mpu Athlon MP 1200 (OPN AHX1200ANS3B) based on the Palomino core was a 32-bit x86 multiprocessor developed by AMD and introduced in 2001 for the server and workstation market. This particular model, which operated at 1.2 GHz, had a lower FSB operating at 100 MHz (for an effective transfer rate of 200 MT/s) and operated at higher nominal voltage of 1.8 V. This processor, which was based on the K7 microarchitecture, was manufactured on a mature 180 nm copper interconnect technology at AMD's Fab 30 in Dresden, Germany.

Cache

Main article: K7 § Cache

[Edit/Modify Cache Info]

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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
1x64 KiB2-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
1x64 KiB2-way set associative 
L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x256 KiB16-way set associative 

Graphics

This MPU has no integrated graphics processing unit.

Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
SSEStreaming SIMD Extensions
x86-1616-bit x86
x86-3232-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
SmartMPSmartMP Technology
  • Advanced Configuration and Power Interface
    • Halt State
    • Stop Grant State

Documents

Datasheets

Others

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/athlon_mp/ahx1200ans3b&oldid=53775"
Facts about "Athlon MP 1200 - AMD"
RDF feed
base frequency1,200 MHz (1.2 GHz, 1,200,000 kHz) +
bus rate200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
chipsetAMD-760MP +
clock multiplier12 +
core count1 +
core family6 +
core model6 +
core namePalomino +
core stepping2 +
core voltage1.8 V (18 dV, 180 cV, 1,800 mV) +
cpuid662 +
designerAMD +
die area128 mm² (0.198 in², 1.28 cm², 128,000,000 µm²) +
familyAthlon MP +
first announcedJune 5, 2001 +
first launchedJune 5, 2001 +
full page nameamd/athlon mp/ahx1200ans3b +
has amd smartmp technologytrue +
has featureSmartMP Technology +, ACPI +, Halt State + and Stop Grant State +
has locked clock multipliertrue +
has multiprocessing supporttrue +
instance ofmicroprocessor +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateJune 5, 2001 +
manufacturerAMD +
market segmentServer +
max case temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max cpu count2 +
max junction temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberAthlon MP 1200 +
nameAMD Athlon MP 1200 +
part numberAHX1200ANS3B +
platformAthlon MP +
process180 nm (0.18 μm, 1.8e-4 mm) +
release price$ 265.00 (€ 238.50, £ 214.65, ¥ 27,382.45) +
smp max ways2 +
technologyCMOS +
thread count1 +
transistor count37,500,000 +
word size32 bit (4 octets, 8 nibbles) +