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| + | '''Skylake Y''' ('''SKL-Y''') is the core name for [[Intel]]'s ultra-low power line of processors based on the {{intel|Skylake|l=arch}} microarchitecture, replacing the {{intel|Broadwell Y|l=core}} core. These chips are primarily targeted towards 2-in-1s detachable, tablets, computer sticks, and other ultra-low power devices. Skylake Y processors are fabricated on Intel's [[14 nm process]] and provide {{intel|skylake#Key_changes_from_Broadwell|a large set of improvements over|l=arch}} comparable Broadwell models.  | ||
| + | |||
| + | == Overview ==  | ||
| + | Skylake Y based processors are a single-chip solution - the [[chipset]] is packaged in the same physical casing as the CPU in a [[multi-chip package]] (MCP). Communication between the separate dies are done via a lightweight On-Package Interconnect (OPI) interface, allowing for a 4 GT/s transfer rate. SKL-Y chips use {{intel|BGA-1515|Socket BGA-1515}}.  | ||
| + | |||
| + | === Common Features ===  | ||
| + | All Skylake Y processors have the following:  | ||
| + | |||
| + | * Dual-channel Memory  | ||
| + | ** Up to DDR3L-1600, LPDDR3-1866  | ||
| + | ** Up to 16 GiB  | ||
| + | * 10-12x PCIe  | ||
| + | * [[dual-core]] with 4 threads  | ||
| + | * Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) (not all Y models support {{x86|AVX}}/{{x86|AVX2}})  | ||
| + | * Support [[RAID]], [[AHCI]], {{intel|Smart Response}}, [[High Definition Audio]], 6x [[USB 3.0]] ports, 6x [[USB 2.0]] ports, 4x [[SATA III]], 6x [[I2C]], 3x [[UART]], 1x [[SDXC]]   | ||
| + | * Graphics  | ||
| + | ** {{intel|HD Graphics 515}} ({{intel|Gen9|l=arch}} GT2)  | ||
| + | ** 3 independent displays supported  | ||
| + | ** Base frequency of 300 MHz  | ||
| + | ** Burst frequency of 800-1,000 MHz  | ||
Revision as of 15:13, 3 June 2017
| Edit Values | |
| Skylake Y | |
| General Info | |
| Designer | Intel | 
| Manufacturer | Intel | 
| Introduction | September 1, 2015 (announced) September 1, 2015 (launched)  | 
| Microarchitecture | |
| ISA | x86-64 | 
| Microarchitecture | Skylake | 
| Word Size | 8 octets  64 bit16 nibbles  | 
| Process | 14 nm 0.014 μm  1.4e-5 mm  | 
| Technology | CMOS | 
| Clock | 900 MHz - 1,500 MHz | 
| Succession | |
Skylake Y (SKL-Y) is the core name for Intel's ultra-low power line of processors based on the Skylake microarchitecture, replacing the Broadwell Y core. These chips are primarily targeted towards 2-in-1s detachable, tablets, computer sticks, and other ultra-low power devices. Skylake Y processors are fabricated on Intel's 14 nm process and provide a large set of improvements over comparable Broadwell models.
Overview
Skylake Y based processors are a single-chip solution - the chipset is packaged in the same physical casing as the CPU in a multi-chip package (MCP). Communication between the separate dies are done via a lightweight On-Package Interconnect (OPI) interface, allowing for a 4 GT/s transfer rate. SKL-Y chips use Socket BGA-1515.
Common Features
All Skylake Y processors have the following:
-  Dual-channel Memory
- Up to DDR3L-1600, LPDDR3-1866
 - Up to 16 GiB
 
 - 10-12x PCIe
 - dual-core with 4 threads
 - Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) (not all Y models support AVX/AVX2)
 - Support RAID, AHCI, Smart Response, High Definition Audio, 6x USB 3.0 ports, 6x USB 2.0 ports, 4x SATA III, 6x I2C, 3x UART, 1x SDXC
 -  Graphics
- HD Graphics 515 (Gen9 GT2)
 - 3 independent displays supported
 - Base frequency of 300 MHz
 - Burst frequency of 800-1,000 MHz
 
 
| designer | Intel + | 
| first announced | September 1, 2015 + | 
| first launched | September 1, 2015 + | 
| instance of | core + | 
| isa | x86-64 + | 
| main image | |
| manufacturer | Intel + | 
| microarchitecture | Skylake + | 
| name | Skylake Y + | 
| process | 14 nm (0.014 μm, 1.4e-5 mm) + | 
| technology | CMOS + | 
| word size | 64 bit (8 octets, 16 nibbles) + |