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Difference between revisions of "amd/cores/rome"
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'''Rome''' is the codename for [[AMD]]'s high-performance enterprise-level server [[multiprocessors]] based on the {{amd|Zen 2|l=arch}} microarchitecture serving as a successor to {{\\|Naples}}. Rome-based chips are set to be fabricated on GlobalFoundries' [[7 nm process]].
 
'''Rome''' is the codename for [[AMD]]'s high-performance enterprise-level server [[multiprocessors]] based on the {{amd|Zen 2|l=arch}} microarchitecture serving as a successor to {{\\|Naples}}. Rome-based chips are set to be fabricated on GlobalFoundries' [[7 nm process]].
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[[File:amd epyc rodmap.png|right|thumb|AMD datacenter roadmap]]

Revision as of 18:46, 16 May 2017

Edit Values
Rome
no photo (ic).svg
General Info
DesignerAMD
ManufacturerGlobalFoundries
IntroductionMay 16, 2017 (announced)
Microarchitecture
ISAx86-64
MicroarchitectureZen 2
Word Size
8 octets
16 nibbles
64 bit
Process7 nm
0.007 μm
7.0e-6 mm
TechnologyCMOS
Succession

Rome is the codename for AMD's high-performance enterprise-level server multiprocessors based on the Zen 2 microarchitecture serving as a successor to Naples. Rome-based chips are set to be fabricated on GlobalFoundries' 7 nm process.

AMD datacenter roadmap
Facts about "Rome - Cores - AMD"
designerAMD +
first announcedMay 16, 2017 +
instance ofcore +
isax86-64 +
manufacturerGlobalFoundries +
microarchitectureZen 2 +
nameRome +
process7 nm (0.007 μm, 7.0e-6 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +