Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/cores/canmore"
| Line 33: | Line 33: | ||
== Documents == | == Documents == | ||
* [[:File:canmore-product-brief.pdf|Canmore Product Brief]] | * [[:File:canmore-product-brief.pdf|Canmore Product Brief]] | ||
| + | * [[:File:ce3100-design-guide.pdf|Thermal Design Guide]], August 2008 | ||
Latest revision as of 07:06, 3 April 2017
| Edit Values | |
| Canmore | |
 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | August 20, 2008 (announced) September 8, 2008 (launched) |
| Microarchitecture | |
| Microarchitecture | Pentium M |
| Word Size | 4 octets 32 bit8 nibbles |
| Process | 90 nm 0.09 μm 9.0e-5 mm |
| Technology | CMOS |
| Succession | |
Canmore is the core for Intel's series of consumer electronics system on chips based on the Pentium M microarchitecture. Canmore replaces Olo River which was based on Intel's XScale (an ARM chip). Canmore is the first x86 SoC for consumer electronics. Canmore SoCs were branded as Intel CE 31xx model.
Documents[edit]
- Canmore Product Brief
- Thermal Design Guide, August 2008
Facts about "Canmore - Cores - Intel"
| designer | Intel + |
| first announced | August 20, 2008 + |
| first launched | September 8, 2008 + |
| instance of | core + |
| manufacturer | Intel + |
| microarchitecture | Pentium M + |
| name | Canmore + |
| process | 90 nm (0.09 μm, 9.0e-5 mm) + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |