Semiconductor & Computer Engineering
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Difference between revisions of "intel/atom/z520"
| Line 50: | Line 50: | ||
| thread count = 2 | | thread count = 2 | ||
| max cpus = 1 | | max cpus = 1 | ||
| + | |||
| + | | electrical = Yes | ||
| + | | power = | ||
| + | | average power = 220 mW | ||
| + | | idle power = 100 mW | ||
| + | | v core min = 0.75 V | ||
| + | | v core max = 1.1 V | ||
| + | | sdp = 960 mW | ||
| + | | tdp = 2 W | ||
| + | | tjunc min = 0 °C | ||
| + | | tjunc max = 90 °C | ||
| + | | tcase min = 0 °C | ||
| + | | tcase max = 70 °C | ||
| + | | tstorage min = -40 °C | ||
| + | | tstorage max = 85 °C | ||
| package module 1 = {{packages/intel/fcbga-441}} | | package module 1 = {{packages/intel/fcbga-441}} | ||
}} | }} | ||
'''Z520''' is an ultra-low power {{arch|32}} [[x86]] microprocessor introduced by [[Intel]] in early 2008 specifically for Mobile Internet Devices (MID). The Z520, which is based on the {{intel|Bonnell|l=arch}} microarchitecture ({{intel|Silverthorne|l=core}} core), is manufactured on a [[45 nm process]]. This processor operates at 1.33 Ghz with a TDP of just 2 W and an average power of 220 mW. The MPU features a legacy 533 MT/s [[front-side bus]] capable of communicating with the {{intel|Poulsbo|l=chipset}} chipset in both low-power [[CMOS]] mode as well as normal [[GTL]] mode (which also works with other chipsets). | '''Z520''' is an ultra-low power {{arch|32}} [[x86]] microprocessor introduced by [[Intel]] in early 2008 specifically for Mobile Internet Devices (MID). The Z520, which is based on the {{intel|Bonnell|l=arch}} microarchitecture ({{intel|Silverthorne|l=core}} core), is manufactured on a [[45 nm process]]. This processor operates at 1.33 Ghz with a TDP of just 2 W and an average power of 220 mW. The MPU features a legacy 533 MT/s [[front-side bus]] capable of communicating with the {{intel|Poulsbo|l=chipset}} chipset in both low-power [[CMOS]] mode as well as normal [[GTL]] mode (which also works with other chipsets). | ||
Revision as of 16:52, 1 April 2017
Template:mpu Z520 is an ultra-low power 32-bit x86 microprocessor introduced by Intel in early 2008 specifically for Mobile Internet Devices (MID). The Z520, which is based on the Bonnell microarchitecture (Silverthorne core), is manufactured on a 45 nm process. This processor operates at 1.33 Ghz with a TDP of just 2 W and an average power of 220 mW. The MPU features a legacy 533 MT/s front-side bus capable of communicating with the Poulsbo chipset in both low-power CMOS mode as well as normal GTL mode (which also works with other chipsets).