From WikiChip
Difference between revisions of "intel/atom/z510"
< intel‎ | atom

Line 48: Line 48:
 
| word size          = 32 bit
 
| word size          = 32 bit
 
| core count          = 1
 
| core count          = 1
| thread count        = 2
+
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
  

Revision as of 14:43, 1 April 2017

Template:mpu Z510 is an ultra-low power 32-bit x86 microprocessor introduced by Intel in early 2008 specifically for Mobile Internet Devices (MID). The Z510, which is based on the Bonnell microarchitecture (Silverthorne core), is manufactured on a 45 nm process. This processor operates at 1.1 Ghz with a TDP of just 2 W and an average power of 220 mW. The MPU features a legacy 400 MT/s front-side bus capable of communicating with the Poulsbo chipset in both low-power CMOS mode as well as normal GTL mode (which also works with other chipsets).