Semiconductor & Computer Engineering
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Difference between revisions of "xiaomi/surge/s1"
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'''Surge S1''' is a {{arch|64}} [[octa-core]] performance [[ARM]] system-on-chip designed by [[Xiaomi]] and introduced in early [[2017]]. This chip incorporates 8 {{armh|Cortex-A53}} cores in a {{armh|big.LITTLE}} configuration with four cores operating at up to 2.2 GHz with the other four set of cores operating at 1.4 GHz. This processor is fabricated on TSMC's [[28 nm process|28 nm HPC+ process]] and incorporates a {{armh|Mali-T860}} [[IGP]]. | '''Surge S1''' is a {{arch|64}} [[octa-core]] performance [[ARM]] system-on-chip designed by [[Xiaomi]] and introduced in early [[2017]]. This chip incorporates 8 {{armh|Cortex-A53}} cores in a {{armh|big.LITTLE}} configuration with four cores operating at up to 2.2 GHz with the other four set of cores operating at 1.4 GHz. This processor is fabricated on TSMC's [[28 nm process|28 nm HPC+ process]] and incorporates a {{armh|Mali-T860}} [[IGP]]. | ||
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Revision as of 15:34, 3 March 2017
Template:mpu Surge S1 is a 64-bit octa-core performance ARM system-on-chip designed by Xiaomi and introduced in early 2017. This chip incorporates 8 Cortex-A53 cores in a big.LITTLE configuration with four cores operating at up to 2.2 GHz with the other four set of cores operating at 1.4 GHz. This processor is fabricated on TSMC's 28 nm HPC+ process and incorporates a Mali-T860 IGP.
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Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release. |