From WikiChip
Difference between revisions of "intel/xeon e7/e7-2830"
< intel‎ | xeon e7

(→‎Memory controller)
(→‎Features)
Line 128: Line 128:
 
}}
 
}}
  
−
== Features ==  
+
== Features ==
−
{{mpu features
+
{{x86 features
−
| em64t      = Yes
+
|real=Yes
−
| nx          = Yes
+
|protected=Yes
−
| txt        = Yes
+
|smm=Yes
−
| tsx        =  
+
|fpu=Yes
−
| vpro        =  
+
|x8616=Yes
−
| ht          = Yes
+
|x8632=Yes
−
| tbt1        = Yes
+
|x8664=Yes
−
| tbt2        =
+
|nx=Yes
−
| bpt        =  
+
|3dnow=No
−
| vt-x        = Yes
+
|e3dnow=No
−
| vt-d        = yes
+
|mmx=Yes
−
| ept        = Yes
+
|emmx=Yes
−
| mmx        = Yes
+
|sse=Yes
−
| sse         = Yes
+
|sse2=Yes
−
| sse2       = Yes
+
|sse3=Yes
−
| sse3       = Yes
+
|ssse3=Yes
−
| ssse3       = Yes
+
|sse41=Yes
−
| sse4.1      = Yes
+
|sse42=Yes
−
| sse4.2      = Yes
+
|sse4a=No
−
| aes        = Yes
+
|avx=No
−
| pclmul      =  
+
|avx2=No
−
| avx        =  
+
|avx512=No
−
| avx2        =  
+
|abm=No
−
| bmi        =  
+
|tbm=No
−
| bmi1       =  
+
|bmi1=No
−
| bmi2       =  
+
|bmi2=No
−
| f16c       =  
+
|fma3=No
−
| fma3        =  
+
|fma4=No
−
| mpx         =  
+
|aes=Yes
−
| sgx         =  
+
|rdrand=No
−
| eist        = Yes
+
|sha=No
−
| secure key  =  
+
|xop=No
−
| os guard    =  
+
|adx=No
−
| intel at    =  
+
|clmul=No
 +
|f16c=No
 +
|tbt1=Yes
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=Yes
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdv=No
 +
|rvi=No
 
}}
 
}}

Revision as of 02:13, 2 December 2016

Template:mpu Xeon E7-2830 is a 64-bit octa-core x86 data center microprocessor that supports up to 2 sockets. This first generation Xeon E7 processor, Westmere-based, operates at a base frequency of 2.13 GHz with turob frequency of 2.4 GHz for 2 active cores. This chip has a TDP of 105 W, supporting up to 4 channels of DDR3 with support of up to 1 TB of memory.

Cache

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
524,288 B
0.5 MiB
L1I$256 KiB
262,144 B
0.25 MiB
8x32 KiB4-way set associativewrite-back
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associativewrite-back
L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  8x256 KiB8-way set associativewrite-back
L3$24 MiB
24,576 KiB
25,165,824 B
0.0234 GiB
  8x3 MiB16-way set associativewrite-back

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1066
Supports ECCYes
Max Mem1 TiB
Controllers1
Channels4
Max Bandwidth31.77 GiB/s
32,532.48 MiB/s
34.113 GB/s
34,112.778 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 7.942 GiB/s
Double 15.88 GiB/s
Triple 23.83 GiB/s
Quad 31.77 GiB/s

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AESAES Encryption Instructions
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 1.0Turbo Boost Technology 1.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e7/e7-2830&oldid=30059"
Facts about "Xeon E7-2830 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E7-2830 - Intel#package +
base frequency2,133.33 MHz (2.133 GHz, 2,133,330 kHz) +
bus rate6,400 MT/s (6.4 GT/s, 6,400,000 kT/s) +
bus typeQPI +
chipsetBoxboro +
clock multiplier16 +
core count8 +
core family6 +
core model47 +
core nameWestmere EX +
core steppingA2 +
core voltage1.35 V (13.5 dV, 135 cV, 1,350 mV) +
cpuid206F2 +
designerIntel +
die area513 mm² (0.795 in², 5.13 cm², 513,000,000 µm²) +
familyXeon E7 +
first announcedApril 5, 2011 +
first launchedApril 5, 2011 +
full page nameintel/xeon e7/e7-2830 +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 1.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 1 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description4-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description8-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ description16-way set associative +
l3$ size24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) +
last orderAugust 21, 2015 +
last shipmentFebruary 2, 2018 +
ldateApril 5, 2011 +
manufacturerIntel +
market segmentServer +
max case temperature337.15 K (64 °C, 147.2 °F, 606.87 °R) +
max cpu count2 +
max memory1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth31.77 GiB/s (32,532.48 MiB/s, 34.113 GB/s, 34,112.778 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels4 +
max storage temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
microarchitectureWestmere +
min case temperature278.15 K (5 °C, 41 °F, 500.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberE7-2830 +
nameXeon E7-2830 +
packageFCLGA-8 +
part numberAT80615005787AB +
platformBoxboro +
process32 nm (0.032 μm, 3.2e-5 mm) +
release price$ 1,779.00 (€ 1,601.10, £ 1,440.99, ¥ 183,824.07) +
s-specSLC3J +
seriesE7-2800 +
smp max ways2 +
supported memory typeDDR3-1066 +
tdp105 W (105,000 mW, 0.141 hp, 0.105 kW) +
technologyCMOS +
thread count16 +
transistor count2,600,000,000 +
turbo frequency (1 core)2,399.99 MHz (2.4 GHz, 2,399,990 kHz) +
turbo frequency (2 cores)2,399.99 MHz (2.4 GHz, 2,399,990 kHz) +
turbo frequency (3 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (4 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (5 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (6 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (7 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (8 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
word size64 bit (8 octets, 16 nibbles) +