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Difference between revisions of "intel/celeron/u3400"
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{{intel title|Celeron U3400}} | {{intel title|Celeron U3400}} | ||
| + | {{mpu | ||
| + | | name = Intel Celeron U3400 | ||
| + | | no image = yes | ||
| + | | image = | ||
| + | | image size = | ||
| + | | caption = | ||
| + | | designer = Intel | ||
| + | | manufacturer = Intel | ||
| + | | model number = U3400 | ||
| + | | part number = CN80617006039AA | ||
| + | | market = Mobile | ||
| + | | first announced = May 24, 2010 | ||
| + | | first launched = May 24, 2010 | ||
| + | | last order = | ||
| + | | last shipment = | ||
| + | | release price = | ||
| + | |||
| + | | family = Celeron | ||
| + | | series = P3000 | ||
| + | | locked = Yes | ||
| + | | frequency = 1,066.66 MHz | ||
| + | | bus type = DMI 1.0 | ||
| + | | bus speed = | ||
| + | | bus rate = 2.5 GT/s | ||
| + | | bus links = 1 | ||
| + | | clock multiplier = 8 | ||
| + | | s-spec = SLBUE | ||
| + | | s-spec 2 = | ||
| + | | s-spec qs = | ||
| + | | cpuid = 0x20655 | ||
| + | }} | ||
'''Celeron U3400''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.06 GHz and a TDP of 18 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz. | '''Celeron U3400''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.06 GHz and a TDP of 18 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz. | ||
Revision as of 01:31, 1 December 2016
Template:mpu Celeron U3400 is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in 2010. This processor operates at a frequency of 1.06 GHz and a TDP of 18 W. This MPU is manufactured on a 32 nm process based on the Westmere microarchitecture (Arrandale core). This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz.
Facts about "Celeron U3400 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron U3400 - Intel#package + and Celeron U3400 - Intel#io + |
| base frequency | 1,066.66 MHz (1.067 GHz, 1,066,660 kHz) + |
| bus links | 1 + |
| bus rate | 2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) + |
| bus type | DMI 1.0 + |
| chipset | Ibex Peak + |
| clock multiplier | 8 + |
| core count | 2 + |
| core family | 6 + |
| core model | 37 + |
| core name | Arrandale + |
| core stepping | K0 + |
| cpuid | 0x20655 + |
| designer | Intel + |
| device id | 0x0046 + |
| die area | 81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) + |
| family | Celeron + |
| first announced | May 24, 2010 + |
| first launched | May 24, 2010 + |
| full page name | intel/celeron/u3400 + |
| has ecc memory support | false + |
| has feature | Enhanced SpeedStep Technology + and Flex Memory Access + |
| has intel enhanced speedstep technology | true + |
| has intel flex memory access support | true + |
| has locked clock multiplier | true + |
| instance of | microprocessor + |
| integrated gpu | HD Graphics (Ironlake) + |
| integrated gpu base frequency | 166 MHz (0.166 GHz, 166,000 KHz) + |
| integrated gpu designer | Intel + |
| integrated gpu execution units | 12 + |
| integrated gpu max frequency | 500 MHz (0.5 GHz, 500,000 KHz) + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ description | 8-way set associative + |
| l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
| ldate | May 24, 2010 + |
| manufacturer | Intel + |
| market segment | Mobile + |
| max cpu count | 1 + |
| max junction temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
| max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
| max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
| max memory channels | 2 + |
| max pcie lanes | 16 + |
| max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| microarchitecture | Westmere + |
| min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
| model number | U3400 + |
| name | Intel Celeron U3400 + |
| package | BGA-1288 + |
| part number | CN80617006039AA + |
| platform | Calpella + |
| process | 32 nm (0.032 μm, 3.2e-5 mm) + |
| s-spec | SLBUE + |
| series | P3000 + |
| smp max ways | 1 + |
| supported memory type | DDR3-800 + |
| tdp | 18 W (18,000 mW, 0.0241 hp, 0.018 kW) + |
| technology | CMOS + |
| thread count | 2 + |
| transistor count | 382,000,000 + |
| word size | 64 bit (8 octets, 16 nibbles) + |