From WikiChip
Difference between revisions of "amd/athlon mp/amsn2800dut4c"
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== Features == | == Features == | ||
− | {{ | + | {{x86 features |
− | | | + | |real=Yes |
− | | | + | |protected=Yes |
− | | 3dnow | + | |smm=Yes |
− | | e3dnow | + | |fpu=Yes |
− | | sse | + | |x8616=Yes |
− | | | + | |x8632=Yes |
+ | |x8664=No | ||
+ | |nx=No | ||
+ | |3dnow=Yes | ||
+ | |e3dnow=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=No | ||
+ | |sse3=No | ||
+ | |ssse3=No | ||
+ | |sse41=No | ||
+ | |sse42=No | ||
+ | |sse4a=No | ||
+ | |avx=No | ||
+ | |avx2=No | ||
+ | |avx512=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=No | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |flex=No | ||
+ | |isrt=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |smartmp=Yes | ||
+ | |powernow=No | ||
+ | |amdv=No | ||
+ | |rvi=No | ||
}} | }} | ||
* Advanced Configuration and Power Interface [[has feature::ACPI| ]] | * Advanced Configuration and Power Interface [[has feature::ACPI| ]] |
Revision as of 05:35, 26 November 2016
Template:mpu Athlon MP 2800+' (OPN AMSN2800DUT4C) based on the last-generation Barton core was a 32-bit x86 multiprocessor developed by AMD and introduced in early 2003 for the server and workstation market. This MPU, which operated at 2.13 GHz with a FSB transfer rate of 266 MT/s (x16 multiplier), was manufactured on a newer 130 nm process.
Cache
- Main article: K7 § Cache
Cache Info [Edit Values] | ||
L1I$ | 64 KiB 65,536 B 0.0625 MiB |
1x64 KiB 2-way set associative |
L1D$ | 64 KiB 65,536 B 0.0625 MiB |
1x64 KiB 2-way set associative |
L2$ | 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB |
1x512 KiB 16-way set associative |
Graphics
This MPU has no integrated graphics processing unit.
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- Advanced Configuration and Power Interface
- Halt State
- Stop Grant State
Documents
Datasheets
- AMD Athlon MP Processor Model 10 Data Sheet for Multiprocessor Platforms; Publication # 26426 Rev. C; Issue Date: October 2003.
Others
- System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors; Publication # 25325; Rev: B; August 2002.
Facts about "Athlon MP 2800+ - AMD"
has amd smartmp technology | true + |
has feature | SmartMP Technology +, ACPI +, Halt State + and Stop Grant State + |
has multiprocessing support | true + |
l1d$ description | 2-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |