From WikiChip
Difference between revisions of "intel/xeon e5/e5-2620 v4"
(+q-spec) |
(typo) |
||
| Line 35: | Line 35: | ||
| s-spec es = | | s-spec es = | ||
| s-spec qs = QKES | | s-spec qs = QKES | ||
| − | | s-spec qs | + | | s-spec qs 2 = QKRG |
| cpuid = 406F1 | | cpuid = 406F1 | ||
Revision as of 11:51, 5 November 2016
Template:mpu The Xeon E5-2620 v4 is a 64-bit octa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for standard 2S environments (1U square form factor). Operating at 2.1 GHz with a turbo boost frequency of 3 GHz for a single active core, this MPU has a TDP of 85 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 256 KiB 262,144 B 0.25 MiB |
8x32 KiB 8-way set associative (per core, write-back) |
| L1D$ | 256 KiB 262,144 B 0.25 MiB |
8x32 KiB 8-way set associative (per core, write-back) |
| L2$ | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB |
8x256 KiB 8-way set associative (per core, write-back) |
| L3$ | 20 MiB 20,480 KiB 20,971,520 B 0.0195 GiB |
8x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics
This microprocessor has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR4-2133 |
| Controllers | 1 |
| Channels | 4 |
| ECC Support | Yes |
| Max bandwidth | 63.58 GiB/s |
| Bandwidth (single) | 15.89 GiB/s |
| Bandwidth (dual) | 31.79 GiB/s |
| Max memory | 1,536 GiB |
| Physical Address Extensions | 46 bit |
Expansions
Features
Facts about "Xeon E5-2620 v4 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-2620 v4 - Intel#io +, Xeon E5-2620 v4 - Intel + and Xeon E5-2620 v4 - Intel + |
| base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
| bus links | 2 + |
| bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
| bus speed | 4,000 MHz (4 GHz, 4,000,000 kHz) + |
| bus type | QPI + |
| chipset | C610 Series + |
| clock multiplier | 21 + |
| core count | 8 + |
| core family | 6 + |
| core model | 4F + |
| core name | Broadwell EP + |
| core stepping | R0 + |
| core voltage | 1.82 V (18.2 dV, 182 cV, 1,820 mV) + |
| cpuid | 406F1 + |
| designer | Intel + |
| die area | 246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) + |
| family | Xeon E5 + |
| first announced | June 20, 2016 + |
| first launched | June 20, 2016 + |
| full page name | intel/xeon e5/e5-2620 v4 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Extended Page Tables + and Transactional Synchronization Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| io voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
| io voltage tolerance | 3% + |
| isa | x86-64 + |
| isa family | x86 + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
| l3$ description | 20-way set associative + |
| l3$ size | 20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) + |
| ldate | June 20, 2016 + |
| manufacturer | Intel + |
| market segment | Server + |
| max case temperature | 347.15 K (74 °C, 165.2 °F, 624.87 °R) + |
| max cpu count | 2 + |
| max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
| max pcie lanes | 40 + |
| max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| microarchitecture | Broadwell + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
| model number | E5-2620 v4 + |
| name | Xeon E5-2620 v4 + |
| part number | CM8066002032201 + and BX80660E52620V4 + |
| platform | Grantley EP 2S + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 417.00 (€ 375.30, £ 337.77, ¥ 43,088.61) + |
| s-spec | SR2R6 + |
| s-spec (qs) | QKES + and QKRG + |
| series | E5-2000 + |
| smp max ways | 2 + |
| tdp | 85 W (85,000 mW, 0.114 hp, 0.085 kW) + |
| technology | CMOS + |
| thread count | 16 + |
| transistor count | 3,200,000,000 + |
| turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
| turbo frequency (2 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
| turbo frequency (3 cores) | 2,800 MHz (2.8 GHz, 2,800,000 kHz) + |
| turbo frequency (4 cores) | 2,700 MHz (2.7 GHz, 2,700,000 kHz) + |
| turbo frequency (5 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (6 cores) | 2,500 MHz (2.5 GHz, 2,500,000 kHz) + |
| turbo frequency (7 cores) | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
| turbo frequency (8 cores) | 2,300 MHz (2.3 GHz, 2,300,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |