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The '''Xeon E5-2697A v4''' is a {{arch|64}} [[hexadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.6 GHz with a {{intel|turbo boost}} frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | The '''Xeon E5-2697A v4''' is a {{arch|64}} [[hexadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.6 GHz with a {{intel|turbo boost}} frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}} | ||
+ | {{cache info | ||
+ | |l1i cache=512 KiB | ||
+ | |l1i break=16x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1i extra=(per core, write-back) | ||
+ | |l1d cache=512 KiB | ||
+ | |l1d break=16x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d extra=(per core, write-back) | ||
+ | |l2 cache=4 MiB | ||
+ | |l2 break=16x256 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 extra=(per core, write-back) | ||
+ | |l3 cache=40 MiB | ||
+ | |l3 break=16x2.5 MiB | ||
+ | |l3 desc=20-way set associative | ||
+ | |l3 extra=(shared, per core, write-back) | ||
+ | }} |
Revision as of 04:11, 3 November 2016
Template:mpu The Xeon E5-2697A v4 is a 64-bit hexadeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.6 GHz with a turbo boost frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 512 KiB 524,288 B 0.5 MiB |
16x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 512 KiB 524,288 B 0.5 MiB |
16x32 KiB 8-way set associative (per core, write-back) |
L2$ | 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB |
16x256 KiB 8-way set associative (per core, write-back) |
L3$ | 40 MiB 40,960 KiB 41,943,040 B 0.0391 GiB |
16x2.5 MiB 20-way set associative (shared, per core, write-back) |
Facts about "Xeon E5-2697A v4 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-2697A v4 - Intel#io + |
base frequency | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
bus links | 2 + |
bus rate | 9,600 MT/s (9.6 GT/s, 9,600,000 kT/s) + |
bus speed | 4,800 MHz (4.8 GHz, 4,800,000 kHz) + |
bus type | QPI + |
chipset | C610 Series + |
clock multiplier | 26 + |
core count | 16 + |
core family | 6 + |
core model | 4F + |
core name | Broadwell EP + |
core stepping | B0 + |
core voltage | 1.82 V (18.2 dV, 182 cV, 1,820 mV) + |
cpuid | 406F1 + |
designer | Intel + |
die area | 456.12 mm² (0.707 in², 4.561 cm², 456,120,000 µm²) + |
family | Xeon E5 + |
first announced | June 20, 2016 + |
first launched | June 20, 2016 + |
full page name | intel/xeon e5/e5-2697a v4 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has extended page tables support | true + |
has feature | Trusted Execution Technology +, Transactional Synchronization Extensions +, Intel vPro Technology +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology + and Extended Page Tables + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
io voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
io voltage tolerance | 3% + |
isa | x86-64 + |
isa family | x86 + |
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 40 MiB (40,960 KiB, 41,943,040 B, 0.0391 GiB) + |
ldate | June 20, 2016 + |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 351.15 K (78 °C, 172.4 °F, 632.07 °R) + |
max cpu count | 2 + |
max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
max pcie lanes | 40 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Broadwell + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | E5-2697A v4 + |
name | Xeon E5-2697A v4 + |
part number | CM8066002645900 + |
platform | Grantley EP 2S + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 2,891.00 (€ 2,601.90, £ 2,341.71, ¥ 298,727.03) + |
s-spec | SR2K1 + |
s-spec (qs) | QK7S + |
series | E5-2000 + |
smp max ways | 2 + |
tdp | 145 W (145,000 mW, 0.194 hp, 0.145 kW) + |
technology | CMOS + |
thread count | 32 + |
transistor count | 7,200,000,000 + |
turbo frequency (10 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (11 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (12 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (13 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (14 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (15 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (16 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (1 core) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
turbo frequency (2 cores) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
turbo frequency (3 cores) | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
turbo frequency (4 cores) | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
turbo frequency (5 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (6 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (7 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (8 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (9 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |