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Difference between revisions of "intel/microarchitectures/tiger lake"
< intel | microarchitectures
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− | '''Tigerlake''' is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Icelake}}. Tigerlake is expected to be fabricated using a [[10 nm process]]. | + | '''Tigerlake''' is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Icelake}}. Tigerlake is expected to be fabricated using a [[10 nm process]]. Tigerlake is the "Optimization" microarchitecture as part of Intel's {{intel|PAO}} model. |
Revision as of 06:59, 16 September 2016
Edit Values | |
Tigerlake µarch | |
General Info |
Tigerlake is a planned microarchitecture by Intel as a successor to Icelake. Tigerlake is expected to be fabricated using a 10 nm process. Tigerlake is the "Optimization" microarchitecture as part of Intel's PAO model.