From WikiChip
Difference between revisions of "ambric/am2000/am2012"
Line 11: | Line 11: | ||
| part number = Am2012 | | part number = Am2012 | ||
| market = Embedded | | market = Embedded | ||
− | | first announced = | + | | first announced = October 10, 2006 |
− | | first launched = | + | | first launched = January 2007 |
| last order = 2012 | | last order = 2012 | ||
| last shipment = 2012 | | last shipment = 2012 |
Revision as of 16:10, 24 June 2016
Template:mpu Am2012 was an MPPA introduced in late 2006 by Ambric. This model was made of 12 Brics arranged as a grid, making up a total of 96 32-bit RICS-like cores operating asynchronously at 1-333 MHz.
Architecture
- Main article: Am2000 § Architecture
The Am2012 is made of 12 homogeneous 'Brics' laid out in a grid to form 96 cores and 96 RAM units.
General layout:
- 12x Brics
Cache
The Am2012 contains 12 Brics, each with its own RAM Unit (RU) of 13 kB of SRAM for a total of 156 kB of SRAM.
Memory controller
Integrated Memory Controller | |
Type | DDR2-400 |
Controllers | 2 |
Channels | 1 |
Expansions
- PCIe
- JTAG
- GPIO @ 100 MHz
- serial flash