From WikiChip
Difference between revisions of "amd/am486/am486dx4-100sv8b"
| Line 75: | Line 75: | ||
| socket 0 3 = Socket 3 | | socket 0 3 = Socket 3 | ||
| socket 0 3 type = | | socket 0 3 type = | ||
| + | | package 1 = SQFP-208 | ||
| + | | package 1 type = SQFP | ||
| + | | package 1 pins = 208 | ||
| + | | package 1 pitch = 0.5 mm | ||
| + | | package 1 width = 30.35 mm | ||
| + | | package 1 length = 30.35 mm | ||
| + | | package 1 height = 3.8 mm | ||
| + | | socket 1 = | ||
| + | | socket 1 type = | ||
}} | }} | ||
'''Am486DX4-100SV8B''' was an Enhanced {{amd|Am486}} microprocessor introduced by [[AMD]] in 1996. This processor had a clock multiplier of 3 having a frequency of 100 MHz with a bus frequency of 33 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache. | '''Am486DX4-100SV8B''' was an Enhanced {{amd|Am486}} microprocessor introduced by [[AMD]] in 1996. This processor had a clock multiplier of 3 having a frequency of 100 MHz with a bus frequency of 33 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache. | ||
| Line 91: | Line 100: | ||
== Features == | == Features == | ||
| + | * Stop-clock control | ||
* [[has feature::System Management Mode]] (SMM) | * [[has feature::System Management Mode]] (SMM) | ||
| + | |||
| + | == Packaging == | ||
| + | {| class="wikitable" | ||
| + | ! Part !! Package | ||
| + | |- | ||
| + | | A80486DX4-100SV8B || CPGA-168 | ||
| + | |- | ||
| + | | S80486DX4-100SV8B || SQFP-208 | ||
| + | |} | ||
| + | |||
| + | == Documents == | ||
| + | * [[:File:AMD Enhanced Am486 (March, 1996).pdf|AMD Enhanced Am486 (March, 1996)]] | ||
== See also == | == See also == | ||
* {{amd|Am486|Am486 family}} | * {{amd|Am486|Am486 family}} | ||
Revision as of 01:14, 17 May 2016
Template:mpu Am486DX4-100SV8B was an Enhanced Am486 microprocessor introduced by AMD in 1996. This processor had a clock multiplier of 3 having a frequency of 100 MHz with a bus frequency of 33 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- Stop-clock control
- System Management Mode (SMM)
Packaging
| Part | Package |
|---|---|
| A80486DX4-100SV8B | CPGA-168 |
| S80486DX4-100SV8B | SQFP-208 |
Documents
See also
Facts about "Am486DX4-100SV8B - AMD"
| base frequency | 100 MHz (0.1 GHz, 100,000 kHz) + |
| bus rate | 33 MT/s (0.033 GT/s, 33,000 kT/s) + |
| bus speed | 33 MHz (0.033 GHz, 33,000 kHz) + |
| bus type | FSB + |
| clock multiplier | 3 + |
| core count | 1 + |
| core name | Am486DX4S + |
| core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| core voltage tolerance | 0.3 V + |
| designer | AMD + |
| family | Am486 + |
| first announced | 1995 + |
| first launched | March 1996 + |
| full page name | amd/am486/am486dx4-100sv8b + |
| has feature | System Management Mode + |
| instance of | microprocessor + |
| l1$ description | 4-way set associative + |
| l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |
| ldate | March 1996 + |
| main image | |
| main image caption | Am486DX4-100SV8B + |
| manufacturer | AMD + |
| max cpu count | 1 + |
| max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
| max operating temperature | 85 °C + |
| microarchitecture | 80486 + |
| min operating temperature | 0 °C + |
| model number | Am486DX4-100SV8B + |
| name | Am486DX4-100SV8B + |
| part number | A80486DX4-100SV8B + and S80486DX4-100SV8B + |
| process | 500 nm (0.5 μm, 5.0e-4 mm) + |
| series | Am486DX4S + |
| smp max ways | 1 + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |