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Difference between revisions of "intel/core i7/i7-5500du"
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{{intel title|Core i7-5500DU}} | {{intel title|Core i7-5500DU}} | ||
{{mpu | {{mpu | ||
− | | name | + | | name = Intel Core i7-5500DU |
− | | no image | + | | no image = Yes |
− | | image | + | | image = |
− | | image size | + | | image size = |
− | | caption = | + | | caption = |
− | | manufacturer | + | | designer = Intel |
− | | model number | + | | manufacturer = Intel |
− | | part number | + | | model number = i7-5500DU |
− | | market | + | | part number = FH8065801620005 |
− | | first announced | + | | market = Mobile |
− | | first launched | + | | first announced = December 27, 2015 |
− | | last order | + | | first launched = 2016 |
− | | last shipment | + | | last order = |
+ | | last shipment = | ||
+ | | release price = $393 | ||
− | | family | + | | family = Core i7 |
− | | series | + | | series = 5500DU |
− | | locked | + | | locked = Yes |
− | | frequency | + | | frequency = 2,400 MHz |
− | | turbo frequency | + | | turbo frequency = |
− | | | + | | bus type = DMI 3.0 |
− | | | + | | bus speed = |
− | | | + | | bus rate = 8.0 GT/s |
− | + | | bus links = | |
− | | bus | + | | clock multiplier = 24 |
− | | | + | | s-spec = SR2NT |
− | | | + | | s-spec qs = |
− | | s-spec | + | | cpuid = |
− | | microarch | + | | microarch = Broadwell |
− | | platform = | + | | platform = |
− | | core | + | | chipset = |
− | | core stepping | + | | core name = Broadwell U |
− | | process | + | | core family = |
− | | die | + | | core model = |
− | | word size | + | | core stepping = |
− | | core count | + | | process = 14 nm |
− | | thread count | + | | transistors = |
− | | max cpus | + | | technology = CMOS |
− | | max memory | + | | die area = <!-- XX mm² --> |
+ | | die width = | ||
+ | | die length = | ||
+ | | word size = 64 bit | ||
+ | | core count = 2 | ||
+ | | thread count = 4 | ||
+ | | max cpus = 1 | ||
+ | | max memory = 32 GiB | ||
+ | | max memory addr = | ||
− | | electrical | + | | electrical = Yes |
− | | tdp | + | | v core = |
− | | ctdp down | + | | v core tolerance = |
− | | ctdp up = | + | | v io = |
− | | temp max = 100 | + | | v io tolerance = |
− | | | + | | sdp = |
+ | | tdp = | ||
+ | | tdp typical = | ||
+ | | ctdp down = | ||
+ | | ctdp down frequency = | ||
+ | | ctdp up = | ||
+ | | ctdp up frequency = | ||
+ | | temp min = | ||
+ | | temp max = | ||
+ | | tjunc min = | ||
+ | | tjunc max = | ||
+ | | tcase min = 0 °C | ||
+ | | tcase max = 100 °C | ||
+ | | tstorage min = | ||
+ | | tstorage max = | ||
+ | | tambient min = | ||
+ | | tambient max = | ||
− | | packaging | + | | packaging = Yes |
− | | package | + | | package 0 = FCBGA-1168 |
− | | package type | + | | package 0 type = FCBGA |
− | | package pitch | + | | package 0 pins = 1168 |
− | | package | + | | package 0 pitch = 0.65 mm |
− | | socket | + | | package 0 width = 40 mm |
− | | socket type | + | | package 0 length = 24 mm |
+ | | package 0 height = 1.5 mm | ||
+ | | socket 0 = BGA-1168 | ||
+ | | socket 0 type = BGA | ||
}} | }} | ||
− | + | '''Core i7-5500DU''' is a {{arch|64}} [[dual-core]] [[x86]] performance mobile [[microprocessor]] introduced by [[Intel]] in early [[2016]]. This processor operates at 2.4 GHz and is based on the {{intel|Broadwell|l=arch}} [[microarchitecture]] manufactured on a [[14 nm process]]. | |
− | {{ | + | == Cache == |
− | + | {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} | |
− | + | {{cache info | |
− | + | |l1i cache=64 KiB | |
+ | |l1i break=2x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1i extra=(per core, write-back) | ||
+ | |l1d cache=64 KiB | ||
+ | |l1d break=2x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d extra=(per core, write-back) | ||
+ | |l2 cache=512 KiB | ||
+ | |l2 break=2x256 KiB | ||
+ | |l2 desc=4-way set associative | ||
+ | |l2 extra=(per core, write-back) | ||
+ | |l3 cache=4 MiB | ||
+ | |l3 break=2x2 MiB | ||
+ | |l3 desc=16-way set associative | ||
+ | |l3 extra=(shared) | ||
+ | }} |
Revision as of 12:59, 24 November 2016
Template:mpu Core i7-5500DU is a 64-bit dual-core x86 performance mobile microprocessor introduced by Intel in early 2016. This processor operates at 2.4 GHz and is based on the Broadwell microarchitecture manufactured on a 14 nm process.
Cache
- Main article: Skylake § Cache
Cache Info [Edit Values] | ||
L1I$ | 64 KiB 65,536 B 0.0625 MiB |
2x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 64 KiB 65,536 B 0.0625 MiB |
2x32 KiB 8-way set associative (per core, write-back) |
L2$ | 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB |
2x256 KiB 4-way set associative (per core, write-back) |
L3$ | 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB |
2x2 MiB 16-way set associative (shared) |
Facts about "Core i7-5500DU - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i7-5500DU - Intel#io + |
base frequency | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
clock multiplier | 24 + |
core count | 2 + |
core name | Broadwell U + |
designer | Intel + |
family | Core i7 + |
first announced | December 27, 2015 + |
first launched | 2016 + |
full page name | intel/core i7/i7-5500du + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has extended page tables support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Enhanced SpeedStep Technology +, Extended Page Tables +, Hyper-Threading Technology +, Memory Protection Extensions +, Software Guard Extensions +, Trusted Execution Technology + and Turbo Boost Technology 2.0 + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | 2016 + |
manufacturer | Intel + |
market segment | Mobile + |
max case temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max cpu count | 1 + |
max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) + |
max pcie lanes | 12 + |
microarchitecture | Broadwell + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | i7-5500DU + |
name | Intel Core i7-5500DU + |
part number | FH8065801620005 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 393.00 (€ 353.70, £ 318.33, ¥ 40,608.69) + |
s-spec | SR2NT + |
series | 5500DU + |
smp max ways | 1 + |
technology | CMOS + |
thread count | 4 + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |