Semiconductor & Computer Engineering
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Difference between revisions of "Template:microarchitecture"
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{{#if:{{{feature|}}}|{{!}} '''Features''' {{!}}{{!}} {{{feature}}}|}} | {{#if:{{{feature|}}}|{{!}} '''Features''' {{!}}{{!}} {{{feature}}}|}} | ||
{{#if:{{{extension|}}}|{{!-}}|<div></div>}} | {{#if:{{{extension|}}}|{{!-}}|<div></div>}} | ||
| − | {{#if:{{{extension|}}}|{{!}} '''Extensions''' {{!}}{{!}} {{{extension}}}{{#if:{{{extension 2|}}}|, {{{extension 2}}}}}{{#if:{{{extension 3|}}}|, {{{extension 3}}}}}{{#if:{{{extension 4|}}}|, {{{extension 4}}}}}{{#if:{{{extension 5|}}}|, {{{extension 5}}}}}{{#if:{{{extension 6|}}}|, {{{extension 6}}}}}{{#if:{{{extension 7|}}}|, {{{extension 7}}}}}{{#if:{{{extension 8|}}}|, {{{extension 8}}}}}{{#if:{{{extension 9|}}}|, {{{extension 9}}}}}{{#if:{{{extension 10|}}}|, {{{extension 10}}}}}{{#if:{{{extension 11|}}}|, {{{extension 11}}}}}{{#if:{{{extension 12|}}}|, {{{extension 12}}}}}{{#if:{{{extension 13|}}}|, {{{extension 13}}}}}{{#if:{{{extension 14|}}}|, {{{extension 14}}}}}{{#if:{{{extension 15|}}}|, {{{extension 15}}}}}{{#if:{{{extension 16|}}}|, {{{extension 16}}}}}{{#if:{{{extension 17|}}}|, {{{extension 17}}}}}{{#if:{{{extension 18|}}}|, {{{extension 18}}}}}{{#if:{{{extension 19|}}}|, {{{extension 19}}}}}{{#if:{{{extension 20|}}}|, {{{extension 20}}}}}{{#if:{{{extension 21|}}}|, {{{extension 21}}}}}{{#if:{{{extension 22|}}}|, {{{extension 22}}}}}{{#if:{{{extension 23|}}}|, {{{extension 23}}}}}{{#if:{{{extension 24|}}}|, {{{extension 24}}}}}{{#if:{{{extension 25|}}}|, {{{extension 25}}}}}{{#if:{{{extension 26|}}}|, {{{extension 26}}}}} |}} | + | {{#if:{{{extension|}}}|{{!}} '''Extensions''' {{!}}{{!}} {{{extension}}}{{#if:{{{extension 2|}}}|, {{{extension 2}}}}}{{#if:{{{extension 3|}}}|, {{{extension 3}}}}}{{#if:{{{extension 4|}}}|, {{{extension 4}}}}}{{#if:{{{extension 5|}}}|, {{{extension 5}}}}}{{#if:{{{extension 6|}}}|, {{{extension 6}}}}}{{#if:{{{extension 7|}}}|, {{{extension 7}}}}}{{#if:{{{extension 8|}}}|, {{{extension 8}}}}}{{#if:{{{extension 9|}}}|, {{{extension 9}}}}}{{#if:{{{extension 10|}}}|, {{{extension 10}}}}}{{#if:{{{extension 11|}}}|, {{{extension 11}}}}}{{#if:{{{extension 12|}}}|, {{{extension 12}}}}}{{#if:{{{extension 13|}}}|, {{{extension 13}}}}}{{#if:{{{extension 14|}}}|, {{{extension 14}}}}}{{#if:{{{extension 15|}}}|, {{{extension 15}}}}}{{#if:{{{extension 16|}}}|, {{{extension 16}}}}}{{#if:{{{extension 17|}}}|, {{{extension 17}}}}}{{#if:{{{extension 18|}}}|, {{{extension 18}}}}}{{#if:{{{extension 19|}}}|, {{{extension 19}}}}}{{#if:{{{extension 20|}}}|, {{{extension 20}}}}}{{#if:{{{extension 21|}}}|, {{{extension 21}}}}}{{#if:{{{extension 22|}}}|, {{{extension 22}}}}}{{#if:{{{extension 23|}}}|, {{{extension 23}}}}}{{#if:{{{extension 24|}}}|, {{{extension 24}}}}}{{#if:{{{extension 25|}}}|, {{{extension 25}}}}}{{#if:{{{extension 26|}}}|, {{{extension 26}}}}}{{#if:{{{extension 27|}}}|, {{{extension 27}}}}}{{#if:{{{extension 28|}}}|, {{{extension 28}}}}}{{#if:{{{extension 29|}}}|, {{{extension 29}}}}}{{#if:{{{extension 30|}}}|, {{{extension 30}}}}}{{#if:{{{extension 31|}}}|, {{{extension 31}}}}}{{#if:{{{extension 32|}}}|, {{{extension 32}}}}}{{#if:{{{extension 33|}}}|, {{{extension 33}}}}}{{#if:{{{extension 34|}}}|, {{{extension 34}}}}}{{#if:{{{extension 35|}}}|, {{{extension 35}}}}}{{#if:{{{extension 36|}}}|, {{{extension 36}}}}}{{#if:{{{extension 37|}}}|, {{{extension 37}}}}}{{#if:{{{extension 38|}}}|, {{{extension 38}}}}}{{#if:{{{extension 39|}}}|, {{{extension 39}}}}}{{#if:{{{extension 40|}}}|, {{{extension 40}}}}} |}} |
{{#if:{{{cache|}}}|{{!-}}|<div></div>}} | {{#if:{{{cache|}}}|{{!-}}|<div></div>}} | ||
{{#if:{{{cache|}}}|{{!}} style="text-align: center; background: #ccffcc; font-size: 12px;" colspan="2" {{!}} '''Cache'''|}} | {{#if:{{{cache|}}}|{{!}} style="text-align: center; background: #ccffcc; font-size: 12px;" colspan="2" {{!}} '''Cache'''|}} | ||
Revision as of 10:34, 2 May 2016
Code
{{microarchitecture
| atype = "CPU" or "GPU" (meta-related)
| name =
| designer =
| manufacturer =
| introduction =
| phase-out =
| process =
| cores =
| cores 2 =
| cores N =
| type = <!-- e.g. "Superscalar" -->
| type 2 =
| type N =
| oooe = <!-- Yes or No only -->
| speculative = <!-- Yes or No only -->
| renaming = <!-- Yes or No only -->
| stages = <!-- ONLY IF FIXED SIZE, otherwise use below for range -->
| stages min =
| stages max =
| decode = 2-way
| isa =
| isa 2 =
| isa N =
| feature =
| extension =
| extension 2 =
| extension N =
| l1i =
| l1i per =
| l1i desc =
| l1d =
| l1d per =
| l1d desc =
| l2 =
| l2 per =
| l2 desc =
| l3 =
| l3 per =
| l3 desc =
| core name =
| core name 2 =
| core name N =
| predecessor =
| predecessor link =
| successor =
| successor link =
| successor 2 =
| successor 2 link =
| successor N =
| successor N link =
}}