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{{ibm title|POWER9 02CY771}}
 
{{ibm title|POWER9 02CY771}}
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{{chip}}
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{{chip
 +
|name=02CY771
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|no image=Yes
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|designer=IBM
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|manufacturer=GlobalFoundries
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|model number=02CY771
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|part number=02CY771
 +
|market=Server
 +
|market 2=Workstation
 +
|first announced=November, 2017
 +
|first launched=November, 2017
 +
|family=POWER
 +
|series=POWER9
 +
|frequency=2.20 GHz
 +
|turbo frequency=3.80 GHz
 +
|isa=Power ISA v3.0B
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|isa family=Power ISA
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|microarch=POWER9
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|core name=Sforza
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|process=14 nm
 +
|transistors=8,000,000,000
 +
|technology=CMOS
 +
|die area=693.37 mm²
 +
|die length=25.228 mm
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|die width=27.48416 mm
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|word size=64 bit
 +
|core count=12
 +
|thread count=48
 +
|max cpus=2
 +
|max memory=2 TiB
 +
|tdp=105 W
 +
|tjunc min=0 °C
 +
|tjunc max=85 °C
 +
|package name 1=ibm,fclga_2601
 +
}}
 
'''POWER9 02CY771''' is a [[12-core]] [[POWER]] server and workstation microprocessor designed by [[IBM]] and introduced in late [[2017]]. This chip is based on the {{ibm|POWER9|l=arch}} microarchitecture and is fabricated on GlobalFoundries [[14 nm process|14nm SOI Process]]. The 02CY771 has a base frequency of 2.2 GHz with a bost frequency of 3.80 GHz and a TDP of 105 W.
 
'''POWER9 02CY771''' is a [[12-core]] [[POWER]] server and workstation microprocessor designed by [[IBM]] and introduced in late [[2017]]. This chip is based on the {{ibm|POWER9|l=arch}} microarchitecture and is fabricated on GlobalFoundries [[14 nm process|14nm SOI Process]]. The 02CY771 has a base frequency of 2.2 GHz with a bost frequency of 3.80 GHz and a TDP of 105 W.
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 +
== Cache ==
 +
{{main|ibm/microarchitectures/power9#Memory_Hierarchy|l1=POWER9 § Cache}}
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{{cache size
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|l1 cache=768 KiB
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|l1i cache=384 KiB
 +
|l1i break=12x32 KiB
 +
|l1i desc=8-way set associative
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|l1d cache=384 KiB
 +
|l1d break=12x32 KiB
 +
|l1d desc=8-way set associative
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|l2 cache=3 MiB
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|l2 break=6x512 KiB
 +
|l2 desc=8-way set associative
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|l3 cache=60 MiB
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|l3 break=6x10 MiB
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|l3 desc=20-way set associative
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}}
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== Memory controller ==
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{{memory controller
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|type=DDR4-2666
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|ecc=No
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|max mem=2 TiB
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|controllers=2
 +
|channels=8
 +
|max bandwidth=158.95 GiB/s
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|bandwidth schan=19.87 GiB/s
 +
|bandwidth dchan=39.74 GiB/s
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|bandwidth qchan=79.47 GiB/s
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|bandwidth ochan=158.95 GiB/s
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}}
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 +
{{ibm power9 sforza memory configs}}
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== Expansions ==
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{{expansions main
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|
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{{expansions entry
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|type=PCIe
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|pcie revision=4.0
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|pcie lanes=48
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|pcie config=x16
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|pcie config 2=x8
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|pcie config 3=x4
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}}
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}}
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== Die ==
 +
{{see also|ibm/microarchitectures/power9#Die|l1=POWER9 § Die}}
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A die shot of IBM's [[22-core]] server microprocessor used in this part:
 +
 +
: [[File:power9 so die.png|500px]]
 +
 +
 +
: [[File:power9 so die (annotated).png|500px]]

Latest revision as of 02:54, 17 January 2019

Edit Values
02CY771
General Info
DesignerIBM
ManufacturerGlobalFoundries
Model Number02CY771
Part Number02CY771
MarketServer, Workstation
IntroductionNovember, 2017 (announced)
November, 2017 (launched)
General Specs
FamilyPOWER
SeriesPOWER9
Frequency2.20 GHz
Turbo Frequency3.80 GHz
Microarchitecture
ISAPower ISA v3.0B (Power ISA)
MicroarchitecturePOWER9
Core NameSforza
Process14 nm
Transistors8,000,000,000
TechnologyCMOS
Die693.37 mm²
25.228 mm × 27.48416 mm
Word Size64 bit
Cores12
Threads48
Max Memory2 TiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
TDP105 W
Tjunction0 °C – 85 °C
Packaging
PackageFCLGA-2601 (PLGA)
Dimension50 mm × 50 mm
Pitch1.016 mm
Contacts2601

POWER9 02CY771 is a 12-core POWER server and workstation microprocessor designed by IBM and introduced in late 2017. This chip is based on the POWER9 microarchitecture and is fabricated on GlobalFoundries 14nm SOI Process. The 02CY771 has a base frequency of 2.2 GHz with a bost frequency of 3.80 GHz and a TDP of 105 W.

Cache[edit]

Main article: POWER9 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$768 KiB
786,432 B
0.75 MiB
L1I$384 KiB
393,216 B
0.375 MiB
12x32 KiB8-way set associative 
L1D$384 KiB
393,216 B
0.375 MiB
12x32 KiB8-way set associative 
L2$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  6x512 KiB8-way set associative 
L3$60 MiB
61,440 KiB
62,914,560 B
0.0586 GiB
  6x10 MiB20-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCNo
Max Mem2 TiB
Controllers2
Channels8
Max Bandwidth158.95 GiB/s
162,764.8 MiB/s
170.671 GB/s
170,671.263 MB/s
0.155 TiB/s
0.171 TB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s
Quad 79.47 GiB/s
Octa 158.95 GiB/s
[Edit] Memory Configurations
Configuration Speed
One DIMM per channel 2666 MHz
Two DIMMs per channel 2400 MHz

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 4.0
Max Lanes: 48
Configuration: x16, x8, x4


Die[edit]

See also: POWER9 § Die

A die shot of IBM's 22-core server microprocessor used in this part:

power9 so die.png


power9 so die (annotated).png
Retrieved from "https://en.wikichip.org/w/index.php?title=ibm/power/02cy771&oldid=86272"
Facts about "POWER9 02CY771 - IBM"
RDF feed
base frequency2,200 MHz (2.2 GHz, 2,200,000 kHz) +
core count12 +
core nameSforza +
designerIBM +
die area693.37 mm² (1.075 in², 6.934 cm², 693,370,000 µm²) +
die length25.228 mm (2.523 cm, 0.993 in, 25,228 µm) +
die width27.484 mm (2.748 cm, 1.082 in, 27,484.16 µm) +
familyPOWER +
first announcedNovember 2017 +
first launchedNovember 2017 +
full page nameibm/power/02cy771 +
instance ofmicroprocessor +
isaPower ISA v3.0B +
isa familyPower ISA +
ldateNovember 2017 +
manufacturerGlobalFoundries +
market segmentServer + and Workstation +
max cpu count2 +
max junction temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
max memory2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
microarchitecturePOWER9 +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number02CY771 +
name02CY771 +
packageFCLGA-2601 +
part number02CY771 +
process14 nm (0.014 μm, 1.4e-5 mm) +
seriesPOWER9 +
smp max ways2 +
tdp105 W (105,000 mW, 0.141 hp, 0.105 kW) +
technologyCMOS +
thread count48 +
transistor count8,000,000,000 +
turbo frequency3,800 MHz (3.8 GHz, 3,800,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +