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{{amd title|Vermeer|core}} | {{amd title|Vermeer|core}} | ||
{{core | {{core | ||
− | |name= | + | |name=Vermeer |
|no image=Yes | |no image=Yes | ||
|developer=AMD | |developer=AMD | ||
− | |manufacturer= | + | |manufacturer=TSMC |
− | |first announced=2020 | + | |manufacturer 2=Globalfoundries |
− | |first launched=2020 | + | |first announced=October 8, 2020 |
+ | |first launched=November 5, 2020 | ||
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
Line 13: | Line 15: | ||
|proc=7 nm | |proc=7 nm | ||
|tech=CMOS | |tech=CMOS | ||
− | |package | + | |clock min=3,000 MHz |
+ | |clock max=3,800 MHz | ||
+ | |package name 1=amd,socket_am4 | ||
|predecessor=Matisse | |predecessor=Matisse | ||
|predecessor link=amd/cores/matisse | |predecessor link=amd/cores/matisse | ||
+ | |successor=Raphael | ||
+ | |successor link=amd/cores/raphael | ||
+ | |contemporary=Vermeer-X | ||
+ | |contemporary link=amd/cores/vermeer | ||
}} | }} | ||
− | '''Vermeer''' is | + | '''Vermeer''' is codename for [[AMD]]'s mainstream through high-end desktop (HEDT) microprocessor line based on the {{amd|Zen 3|l=arch}} microarchitecture serving as a successor to {{\\|Matisse}}. Vermeer processors are fabricated on [[TSMC]] [[7 nm process]]. |
+ | |||
+ | Vermeer-based microprocessors are branded as 5000-series [[Ryzen 3]], [[Ryzen 5]], [[Ryzen 7]], and [[Ryzen 9]] processors. | ||
+ | |||
+ | == Overview == | ||
+ | Vermeer processors are the successor to {{\\|Matisse}}, fabricated on a [[7 nm process]] based on the {{amd|Zen 3|l=arch}} microarchitecture. Those processors are a complete [[system on a chip]] with both the [[northbridge]] and [[southbridge]] on-chip. Matisse chips offer 16 PCIe Gen 4.0 lanes (generally for the GPU) along with four additional x4 PCIe lanes for SATA. | ||
− | + | === Memory Interface === | |
+ | "Vermeer" processors implement two [[wikipedia:DDR4 SDRAM|DDR4]] memory controllers designed for data rates up to 3200 MT/s. Higher frequencies are possible using memory rated for speeds outside the DDR4 standard, however damages caused by overclocking are not covered under warranty. The controllers support up to 2 DIMMs per channel, namely single or dual rank UDIMMs built with x4 or x8 DDR4 devices. ECC is supported<ref>[https://community.amd.com/t5/processors/ryzen-5000-series-ecc-support/td-p/428780 "Ryzen 5000 series ECC support?"]. AMD Community Forum. Retrieved May 2021.</ref> but the feature is generally only validated for "PRO" models and requires an ECC-capable motherboard, BIOS, and operating system. All motherboards should accept ECC DIMMs, this is not proof that error correction was enabled. The maximum total memory capacity is 128 GiB using four UDIMMs of 32 GiB capacity. | ||
+ | {| class="wikitable" style="display: inline-table; text-align: center;" | ||
+ | ! colspan="5" | Memory speed based on DIMM population | ||
+ | |- | ||
+ | ! colspan="2" | Channel A || colspan="2" | Channel B || rowspan="2" | Max. Data Rate<br/>(MT/s) | ||
+ | |- | ||
+ | ! DIMM0 || DIMM1 || DIMM0 || DIMM1 | ||
+ | |- | ||
+ | | - || SR || - || - || 3200 | ||
+ | |- | ||
+ | | - || DR || - || - || 3200 | ||
+ | |- | ||
+ | | - || SR || - || SR || 3200 | ||
+ | |- | ||
+ | | - || DR || - || DR || 3200 | ||
+ | |- | ||
+ | | SR || SR || SR || SR || 2933 | ||
+ | |- | ||
+ | | SR/DR || DR || SR/DR || DR || 2667 | ||
+ | |- | ||
+ | | SR/DR || SR/DR || SR/DR || SR/DR || 2667 | ||
+ | |} | ||
+ | DIMM0 on Channel A is the module closest to the CPU. DIMM0 sockets are not present on motherboards with only two memory slots. | ||
− | + | Please consult the motherboard manual and memory compatibility list provided by the manufacturer for memory installation advice. | |
− | |||
=== Common Features === | === Common Features === | ||
All Vermeer processors have the following: | All Vermeer processors have the following: | ||
− | + | * Dual-channel Memory | |
− | {{ | + | ** Up to DDR4-3200 |
+ | ** Up to 128 [[GiB]] | ||
+ | * Up to [[16 cores]] / 32 threads | ||
+ | * 65 W / 105 W | ||
+ | * Everything up to {{x86||AVX2}} (i.e., {{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}} | ||
+ | * {{amd|Precision Boost 2}}, {{amd|SMEP}}, 2-way [[SMT]], {{amd|AMD-Vi}}, {{amd|XFR 2}} ? | ||
== Vermeer Processors == | == Vermeer Processors == | ||
Line 41: | Line 81: | ||
{{comp table start}} | {{comp table start}} | ||
<table class="comptable sortable tc5 tc6 tc11 tc12"> | <table class="comptable sortable tc5 tc6 tc11 tc12"> | ||
− | {{comp table header|main|11:List of | + | {{comp table header|main|11:List of Vermeer Processors}} |
− | + | {{comp table header|cols|Family|Price|Launched|Cores|Threads|L3$|Base|Turbo|TDP|{{x86|sme#Transparent SME|TSME}}}} | |
− | {{comp table header|cols|Family|Price|Launched|Cores|Threads| | ||
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[core name::Vermeer]] | {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[core name::Vermeer]] | ||
|?full page name | |?full page name | ||
Line 52: | Line 91: | ||
|?core count | |?core count | ||
|?thread count | |?thread count | ||
+ | |?l3$ size#MiB | ||
|?base frequency#GHz | |?base frequency#GHz | ||
− | |?turbo frequency | + | |?turbo frequency#GHz |
|?tdp | |?tdp | ||
− | + | |?has amd transparent secure memory encryption technology | |
− | |?has amd | ||
− | |||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=12:12 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
Line 66: | Line 104: | ||
</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
+ | |||
+ | === SKU Comparison === | ||
+ | Below are a number of SKU comparison graphs based on their specifications. | ||
+ | |||
+ | <div style="float: left; margin: 10px"> | ||
+ | {{#ask: [[Category:microprocessor models by amd]] [[core name::Vermeer]] | ||
+ | |?core count | ||
+ | |?base frequency | ||
+ | |charttitle=Cores vs. Base Frequency | ||
+ | |numbersaxislabel=Frequency (MHz) | ||
+ | |labelaxislabel=Core Count | ||
+ | |height=400 | ||
+ | |width=400 | ||
+ | |theme=vector | ||
+ | |group=property | ||
+ | |grouplabel=subject | ||
+ | |charttype=scatter | ||
+ | |format=jqplotseries | ||
+ | |mainlabel=- | ||
+ | }} | ||
+ | </div> | ||
+ | |||
+ | <div style="float: left; margin: 10px"> | ||
+ | {{#ask: [[Category:microprocessor models by amd]] [[core name::Vermeer]] | ||
+ | |?core count | ||
+ | |?turbo frequency | ||
+ | |charttitle=Cores vs. Turbo Frequency | ||
+ | |numbersaxislabel=Frequency (MHz) | ||
+ | |labelaxislabel=Core Count | ||
+ | |height=400 | ||
+ | |width=400 | ||
+ | |theme=vector | ||
+ | |group=property | ||
+ | |grouplabel=subject | ||
+ | |charttype=scatter | ||
+ | |format=jqplotseries | ||
+ | |mainlabel=- | ||
+ | }} | ||
+ | </div> | ||
+ | |||
+ | <div style="float: left; margin: 10px"> | ||
+ | {{#ask: [[Category:microprocessor models by amd]] [[core name::Vermeer]] | ||
+ | |?core count | ||
+ | |?tdp | ||
+ | |charttitle=Cores vs. TDP | ||
+ | |numbersaxislabel=TDP (W) | ||
+ | |labelaxislabel=Core Count | ||
+ | |height=400 | ||
+ | |width=400 | ||
+ | |theme=vector | ||
+ | |group=property | ||
+ | |grouplabel=subject | ||
+ | |charttype=scatter | ||
+ | |format=jqplotseries | ||
+ | |mainlabel=- | ||
+ | }} | ||
+ | </div> | ||
+ | |||
+ | <div style="float: left; margin: 10px"> | ||
+ | {{#ask: [[Category:microprocessor models by amd]] [[core name::Vermeer]] | ||
+ | |?turbo frequency | ||
+ | |?tdp | ||
+ | |charttitle=Frequency vs. TDP | ||
+ | |numbersaxislabel=TDP (W) | ||
+ | |labelaxislabel=Frequency (MHz) | ||
+ | |height=400 | ||
+ | |width=400 | ||
+ | |theme=vector | ||
+ | |group=property | ||
+ | |grouplabel=subject | ||
+ | |charttype=scatter | ||
+ | |format=jqplotseries | ||
+ | |mainlabel=- | ||
+ | }} | ||
+ | </div> | ||
+ | |||
+ | {{clear}} | ||
+ | |||
+ | == References == | ||
+ | {{reflist}} | ||
== See also == | == See also == | ||
{{amd zen 3 core see also}} | {{amd zen 3 core see also}} |
Latest revision as of 21:13, 1 September 2021
Edit Values | |
Vermeer | |
General Info | |
Designer | AMD |
Manufacturer | TSMC, Globalfoundries |
Introduction | October 8, 2020 (announced) November 5, 2020 (launched) |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen 3 |
Word Size | 8 octets 64 bit16 nibbles |
Process | 7 nm 0.007 μm 7.0e-6 mm |
Technology | CMOS |
Clock | 3,000 MHz - 3,800 MHz |
Packaging | |
Package | OPGA-1331 |
Package Type | Organic Micro Pin Grid Array |
Dimension | 40 mm 4 cm × 40 mm1.575 in 4 cm 1.575 in |
Pitch | 1 mm 0.0394 in |
Contacts | 1331 |
Socket | Socket AM4 |
Succession | |
Contemporary | |
Vermeer-X |
Vermeer is codename for AMD's mainstream through high-end desktop (HEDT) microprocessor line based on the Zen 3 microarchitecture serving as a successor to Matisse. Vermeer processors are fabricated on TSMC 7 nm process.
Vermeer-based microprocessors are branded as 5000-series Ryzen 3, Ryzen 5, Ryzen 7, and Ryzen 9 processors.
Contents
Overview[edit]
Vermeer processors are the successor to Matisse, fabricated on a 7 nm process based on the Zen 3 microarchitecture. Those processors are a complete system on a chip with both the northbridge and southbridge on-chip. Matisse chips offer 16 PCIe Gen 4.0 lanes (generally for the GPU) along with four additional x4 PCIe lanes for SATA.
Memory Interface[edit]
"Vermeer" processors implement two DDR4 memory controllers designed for data rates up to 3200 MT/s. Higher frequencies are possible using memory rated for speeds outside the DDR4 standard, however damages caused by overclocking are not covered under warranty. The controllers support up to 2 DIMMs per channel, namely single or dual rank UDIMMs built with x4 or x8 DDR4 devices. ECC is supported[1] but the feature is generally only validated for "PRO" models and requires an ECC-capable motherboard, BIOS, and operating system. All motherboards should accept ECC DIMMs, this is not proof that error correction was enabled. The maximum total memory capacity is 128 GiB using four UDIMMs of 32 GiB capacity.
Memory speed based on DIMM population | ||||
---|---|---|---|---|
Channel A | Channel B | Max. Data Rate (MT/s) | ||
DIMM0 | DIMM1 | DIMM0 | DIMM1 | |
- | SR | - | - | 3200 |
- | DR | - | - | 3200 |
- | SR | - | SR | 3200 |
- | DR | - | DR | 3200 |
SR | SR | SR | SR | 2933 |
SR/DR | DR | SR/DR | DR | 2667 |
SR/DR | SR/DR | SR/DR | SR/DR | 2667 |
DIMM0 on Channel A is the module closest to the CPU. DIMM0 sockets are not present on motherboards with only two memory slots.
Please consult the motherboard manual and memory compatibility list provided by the manufacturer for memory installation advice.
Common Features[edit]
All Vermeer processors have the following:
- Dual-channel Memory
- Up to DDR4-3200
- Up to 128 GiB
- Up to 16 cores / 32 threads
- 65 W / 105 W
- Everything up to AVX2 (i.e., SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2), and SHA
- Precision Boost 2, SMEP, 2-way SMT, AMD-Vi, XFR 2 ?
Vermeer Processors[edit]
List of Vermeer Processors | |||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
Model | Family | Price | Launched | Cores | Threads | L3$ | Base | Turbo | TDP | TSME | |
5600X | Ryzen 5 | $ 299.00 € 269.10 £ 242.19 ¥ 30,895.67 | 5 November 2020 | 6 | 12 | 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB | 3.7 GHz 3,700 MHz 3,700,000 kHz | 4.6 GHz 4,600 MHz 4,600,000 kHz | 65 W 65,000 mW 0.0872 hp 0.065 kW | ✘ | |
5800 | Ryzen 7 | 12 January 2021 | 8 | 16 | 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB | 3.4 GHz 3,400 MHz 3,400,000 kHz | 4.6 GHz 4,600 MHz 4,600,000 kHz | 65 W 65,000 mW 0.0872 hp 0.065 kW | ✘ | ||
5800X | Ryzen 7 | $ 449.00 € 404.10 £ 363.69 ¥ 46,395.17 | 5 November 2020 | 8 | 16 | 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB | 3.8 GHz 3,800 MHz 3,800,000 kHz | 4.7 GHz 4,700 MHz 4,700,000 kHz | 105 W 105,000 mW 0.141 hp 0.105 kW | ✘ | |
5800X3D | Ryzen 7 | $ 449.00 € 404.10 £ 363.69 ¥ 46,395.17 | 20 April 2022 | 8 | 16 | 96 MiB 98,304 KiB 100,663,296 B 0.0938 GiB | 3.4 GHz 3,400 MHz 3,400,000 kHz | 4.5 GHz 4,500 MHz 4,500,000 kHz | 105 W 105,000 mW 0.141 hp 0.105 kW | ✘ | |
5900 | Ryzen 9 | 12 January 2021 | 12 | 24 | 64 MiB 65,536 KiB 67,108,864 B 0.0625 GiB | 3 GHz 3,000 MHz 3,000,000 kHz | 4.7 GHz 4,700 MHz 4,700,000 kHz | 65 W 65,000 mW 0.0872 hp 0.065 kW | ✘ | ||
5900X | Ryzen 9 | $ 549.00 € 494.10 £ 444.69 ¥ 56,728.17 | 5 November 2020 | 12 | 24 | 64 MiB 65,536 KiB 67,108,864 B 0.0625 GiB | 3.7 GHz 3,700 MHz 3,700,000 kHz | 4.8 GHz 4,800 MHz 4,800,000 kHz | 105 W 105,000 mW 0.141 hp 0.105 kW | ✘ | |
5950X | Ryzen 9 | $ 799.00 € 719.10 £ 647.19 ¥ 82,560.67 | 5 November 2020 | 16 | 32 | 64 MiB 65,536 KiB 67,108,864 B 0.0625 GiB | 3.4 GHz 3,400 MHz 3,400,000 kHz | 4.9 GHz 4,900 MHz 4,900,000 kHz | 105 W 105,000 mW 0.141 hp 0.105 kW | ✘ | |
Count: 7 |
SKU Comparison[edit]
Below are a number of SKU comparison graphs based on their specifications.
References[edit]
- ↑ "Ryzen 5000 series ECC support?". AMD Community Forum. Retrieved May 2021.
See also[edit]
designer | AMD + |
first announced | October 8, 2020 + |
first launched | November 5, 2020 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
manufacturer | TSMC + and Globalfoundries + |
microarchitecture | Zen 3 + |
name | Vermeer + |
package | OPGA-1331 + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |
socket | Socket AM4 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |