From WikiChip
Difference between revisions of "intel/xeon e/e-2124"
< intel‎ | xeon e

 
(18 intermediate revisions by 3 users not shown)
Line 1: Line 1:
 
{{intel title|Xeon E-2124}}
 
{{intel title|Xeon E-2124}}
 
{{chip
 
{{chip
−
|future=Yes
 
 
|name=Xeon E-2124
 
|name=Xeon E-2124
−
|image=coffee lake s (front).png
+
|image=coffee lake e (front).png
 
|designer=Intel
 
|designer=Intel
 
|manufacturer=Intel
 
|manufacturer=Intel
Line 11: Line 10:
 
|market=Workstation
 
|market=Workstation
 
|market 2=Server
 
|market 2=Server
 +
|first announced=July 12, 2018
 +
|first launched=July 12, 2018
 +
|release price=$193
 +
|family=Xeon E
 +
|series=E-2000
 
|locked=Yes
 
|locked=Yes
 +
|frequency=3,300 MHz
 +
|turbo frequency1=4,300 MHz
 
|bus type=DMI 3.0
 
|bus type=DMI 3.0
 
|bus links=4
 
|bus links=4
Line 18: Line 24:
 
|isa family=x86
 
|isa family=x86
 
|microarch=Coffee Lake
 
|microarch=Coffee Lake
−
|platform=Coffee Lake
+
|platform=Mehlow
 
|chipset=Cannon Point
 
|chipset=Cannon Point
 
|core name=Coffee Lake E
 
|core name=Coffee Lake E
Line 31: Line 37:
 
|max cpus=1
 
|max cpus=1
 
|max memory=64 GiB
 
|max memory=64 GiB
 +
|tdp=71 W
 
|package name 1=intel,fclga_1151
 
|package name 1=intel,fclga_1151
 +
}}
 +
'''Xeon E-2124''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] workstation microprocessor introduced by [[Intel]] in mid-[[2018]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The E-2124 operates at 3.3 GHz with a TDP of 71 W and a {{intel|turbo boost}} of 4.3 GHz. This chip supports up to 128 GiB of dual-channel DDR4-2666 memory.
 +
 +
 +
== Cache ==
 +
{{main|intel/microarchitectures/coffee_lake#Memory_Hierarchy|l1=Coffee Lake § Cache}}
 +
{{cache size
 +
|l1 cache=256 KiB
 +
|l1i cache=128 KiB
 +
|l1i break=4x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=128 KiB
 +
|l1d break=4x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=1 MiB
 +
|l2 break=4x256 KiB
 +
|l2 desc=4-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=8 MiB
 +
|l3 break=4x2 MiB
 +
|l3 desc=16-way set associative
 +
|l3 policy=write-back
 +
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR4-2666
 +
|ecc=Yes
 +
|max mem=128 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=39.74 GiB/s
 +
|bandwidth schan=19.87 GiB/s
 +
|bandwidth dchan=39.74 GiB/s
 +
}}
 +
 +
== Expansions ==
 +
{{expansions main
 +
|
 +
{{expansions entry
 +
|type=PCIe
 +
|pcie revision=3.0
 +
|pcie lanes=16
 +
|pcie config=1x16
 +
|pcie config 2=2x8
 +
|pcie config 3=1x8+2x4
 +
}}
 +
}}
 +
== Graphics ==
 +
This processor has no integrated graphics processor.
 +
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=Yes
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|abm=Yes
 +
|tbm=No
 +
|bmi1=Yes
 +
|bmi2=Yes
 +
|fma3=Yes
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=No
 +
|xop=No
 +
|adx=Yes
 +
|clmul=Yes
 +
|f16c=Yes
 +
|tbt1=No
 +
|tbt2=Yes
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=Yes
 +
|txt=Yes
 +
|ht=No
 +
|vpro=Yes
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|intqat=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
|xfr2=No
 +
|mxfr=No
 +
|amdpb=No
 +
|amdpb2=No
 +
|amdpbod=No
 +
}}
 +
== Frequencies ==
 +
{{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
 +
{{frequency table
 +
|freq_base=3,300 MHz
 +
|freq_1=4,300 MHz
 +
|freq_2=4,200 MHz
 +
|freq_3=4,100 MHz
 +
|freq_4=3,900 MHz
 
}}
 
}}

Latest revision as of 09:40, 11 October 2019

Edit Values
Xeon E-2124
coffee lake e (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberE-2124
Part NumberCM8068403654414
S-SpecSR3WQ
MarketWorkstation, Server
IntroductionJuly 12, 2018 (announced)
July 12, 2018 (launched)
Release Price$193
ShopAmazon
General Specs
FamilyXeon E
SeriesE-2000
LockedYes
Frequency3,300 MHz
Turbo Frequency4,300 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureCoffee Lake
PlatformMehlow
ChipsetCannon Point
Core NameCoffee Lake E
Core Family6
Core Model158
Core SteppingU0
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores4
Threads4
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP71 W
Packaging
PackageFCLGA-1151, FCLGA14C (LGA)
Dimension37.5 mm × 37.5 mm × 4.4 mm
Pitch0.914 mm
Contacts1151
SocketSocket H4, LGA-1151

Xeon E-2124 is a 64-bit quad-core high-end performance x86 workstation microprocessor introduced by Intel in mid-2018. This processor, which is based on the Coffee Lake microarchitecture, is manufactured on Intel's 3rd generation enhanced 14nm++ process. The E-2124 operates at 3.3 GHz with a TDP of 71 W and a turbo boost of 4.3 GHz. This chip supports up to 128 GiB of dual-channel DDR4-2666 memory.


Cache[edit]

Main article: Coffee Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB16-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCYes
Max Mem128 GiB
Controllers1
Channels2
Max Bandwidth39.74 GiB/s
40,693.76 MiB/s
42.671 GB/s
42,670.5 MB/s
0.0388 TiB/s
0.0427 TB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4

Graphics[edit]

This processor has no integrated graphics processor.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology

Frequencies[edit]

See also: Intel's CPU Frequency Behavior

[Modify Frequency Info]

ModeBaseTurbo Frequency/Active Cores
1234
Normal3,300 MHz4,300 MHz4,200 MHz4,100 MHz3,900 MHz
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e/e-2124&oldid=93920"
Facts about "Xeon E-2124 - Intel"
RDF feed
full page nameintel/xeon e/e-2124 +
instance ofmicroprocessor +
ldate1900 +