Semiconductor & Computer Engineering
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Difference between revisions of "Template:x86 isa main"
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<div class="header">General</div> | <div class="header">General</div> | ||
* {{x86|History}} | * {{x86|History}} | ||
| − | * {{x86|list of processor families|Families}} | + | * '''{{x86|list of processor families|Families}}''' |
<div class="header">Variants</div> | <div class="header">Variants</div> | ||
* {{x86|x86-16}} | * {{x86|x86-16}} | ||
| Line 11: | Line 11: | ||
* {{x86|Instruction Listing|Instructions}} | * {{x86|Instruction Listing|Instructions}} | ||
* {{x86|Addressing Modes}} | * {{x86|Addressing Modes}} | ||
| − | * {{x86| | + | * {{x86|Calling Convention}} |
| + | * {{x86|Microarchitectures}} | ||
* {{x86|Model-Specific Register}} | * {{x86|Model-Specific Register}} | ||
| + | * {{x86|CPUID}} | ||
* {{x86|Assembly}} | * {{x86|Assembly}} | ||
| − | |||
* {{x86|Interrupts}} | * {{x86|Interrupts}} | ||
| + | * {{x86|Registers}} | ||
* {{x86|Micro-Ops}} | * {{x86|Micro-Ops}} | ||
* {{x86|Timer}} | * {{x86|Timer}} | ||
| − | * {{ | + | <div class="header">CPUIDs</div> |
| − | * {{ | + | * '''{{amd|CPUID|AMD's CPUIDs}}''' |
| + | * '''{{intel|CPUID|Intel's CPUIDs}}''' | ||
<div class="header">Modes</div> | <div class="header">Modes</div> | ||
* {{x86|Real Mode|Real}} | * {{x86|Real Mode|Real}} | ||
| + | * {{x86|Long Mode|Long}} | ||
* {{x86|Protected Mode|Protected}} | * {{x86|Protected Mode|Protected}} | ||
| − | |||
<div class="header">Extensions<small style="float: right;">({{x86|Extensions|all}})</small></div> | <div class="header">Extensions<small style="float: right;">({{x86|Extensions|all}})</small></div> | ||
<div class="wiki-ul-col3"> | <div class="wiki-ul-col3"> | ||
* {{x86|3DNow!}} | * {{x86|3DNow!}} | ||
| + | * {{x86|E3DNow!}} | ||
* {{x86|ABM}} | * {{x86|ABM}} | ||
* {{x86|ADX}} | * {{x86|ADX}} | ||
* {{x86|AES}} | * {{x86|AES}} | ||
| + | * {{x86|AMX}} | ||
* {{x86|AVX}} | * {{x86|AVX}} | ||
* {{x86|AVX2}} | * {{x86|AVX2}} | ||
| Line 36: | Line 41: | ||
* {{x86|BMI2}} | * {{x86|BMI2}} | ||
* {{x86|CLMUL}} | * {{x86|CLMUL}} | ||
| − | |||
| − | |||
* {{x86|F16C}} | * {{x86|F16C}} | ||
* {{x86|FMA3}} | * {{x86|FMA3}} | ||
* {{x86|FMA4}} | * {{x86|FMA4}} | ||
* {{x86|FPU}} | * {{x86|FPU}} | ||
| − | |||
* {{x86|MMX}} | * {{x86|MMX}} | ||
| + | * {{x86|EMMX}} | ||
* {{x86|MPX}} | * {{x86|MPX}} | ||
| + | * {{x86|persistent memory extensions|PMEM}} | ||
* {{x86|PREFETCH}} | * {{x86|PREFETCH}} | ||
* {{x86|RdRAND}} | * {{x86|RdRAND}} | ||
| Line 51: | Line 55: | ||
* {{x86|SHA}} | * {{x86|SHA}} | ||
* {{x86|SME}} | * {{x86|SME}} | ||
| + | * {{x86|TSME}} | ||
* {{x86|SMM}} | * {{x86|SMM}} | ||
* {{x86|SMX}} | * {{x86|SMX}} | ||
| Line 62: | Line 67: | ||
* {{x86|SSSE3}} | * {{x86|SSSE3}} | ||
* {{x86|TBM}} | * {{x86|TBM}} | ||
| + | * {{x86|TSX}} | ||
* {{x86|TME}} | * {{x86|TME}} | ||
| − | * {{x86| | + | * {{x86|MKTME}} |
| − | |||
* {{x86|XOP}} | * {{x86|XOP}} | ||
</div>{{Navbar|Template:x86 isa main|text=|mini=1|style=float:right;}} | </div>{{Navbar|Template:x86 isa main|text=|mini=1|style=float:right;}} | ||
</div> | </div> | ||
Latest revision as of 20:40, 12 February 2025
x86
Instruction Set Architecture
Instruction Set Architecture
General
Variants
Topics
- Instructions
- Addressing Modes
- Calling Convention
- Microarchitectures
- Model-Specific Register
- CPUID
- Assembly
- Interrupts
- Registers
- Micro-Ops
- Timer
CPUIDs
Modes
Extensions(all)