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Difference between revisions of "intel/microarchitectures/knights peak"
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− | '''Knights Peak''' ('''KNP''') was | + | '''Knights Peak''' ('''KNP''') was a planned successor to {{\\|Knights Hill}}, a [[7 nm]] [[many-core]] microarchitecture designed by [[intel]] for high performance computing. |
== History == | == History == |
Latest revision as of 16:26, 8 April 2018
Edit Values | |
Knights Peak µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Process | 7 nm |
Pipeline | |
Type | Superscalar |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Instructions | |
ISA | x86-16, x86-32, x86-64 |
Succession | |
Knights Peak (KNP) was a planned successor to Knights Hill, a 7 nm many-core microarchitecture designed by intel for high performance computing.
History[edit]
Knights Peak was planned to succeed Knights Hill sometimes around 2020. With the cancellation of Knights Hill, Knights Peak was also consequently cancelled.
Brands[edit]
Knights Peak was planned to be branded as 4th generation Xeon Phi
Process Technology[edit]
Knights Peak was intended to be fabricated on Intel's 7 nm process.
Architecture[edit]
No architectural details were ever disclosed by Intel.
Key changes from Knights Hill[edit]
Facts about "Knights Peak - Microarchitectures - Intel"
codename | Knights Peak + |
designer | Intel + |
full page name | intel/microarchitectures/knights peak + |
instance of | microarchitecture + |
instruction set architecture | x86-16 +, x86-32 + and x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Knights Peak + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |