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− | In addition to main memory bandwidth, the PEZY-SC4 supports Wide-IO with a width of 4,096 bit, twice of the {{\\|PEZY-SC3|SC3}}. As with the SC3, the SC4 will use [[ThruChip Interface (TCI) | + | In addition to main memory bandwidth, the PEZY-SC4 supports Wide-IO with a width of 4,096 bit, twice of the {{\\|PEZY-SC3|SC3}}. As with the SC3, the SC4 will use [[ThruChip Interface]] (TCI) interfaces in order to communicate with the TCI-DRAM chips. This chip incorporates 8 interfaces, operating at 3 GHz for a bandwidth of 2.8 TiB/s per interface for a total aggregated bandwidth of 22.35 TB/s - twice the bandwidth of its predecessor. |
{{memory controller | {{memory controller |
Latest revision as of 15:12, 21 April 2018
Edit Values | |
PEZY-SC4 | |
General Info | |
Designer | PEZY |
Manufacturer | TSMC |
Model Number | PEZY-SC4 |
Market | Supercomputer |
Introduction | 2016 (announced) 2020 (launched) |
General Specs | |
Family | PEZY-SCx |
Frequency | 1,600 MHz |
Microarchitecture | |
Process | 5 nm |
Technology | CMOS |
Die | 740 mm² |
Cores | 16,384 |
Threads | 131,072 |
Electrical | |
Power dissipation | 640 W |
Vcore | 0.55 V |
PEZY-SC4 (PEZY Super Computer 4) is a fifth generation many-core microprocessor developed by PEZY set to be introduced in the early-2020s. This chip, which is planned to operate at 1.6 GHz, will incorporate 16,384 cores and dissipate 640 W. The PEZY-SC4 will power the ZettaScaler-4.x series of supercomputers.
Contents
Overview[edit]
The SC4 will be introduced by PEZY along with their fourth-generation ZettaScaler-4.0 supercomputer series. The SC4 is set to incorporate 16,384 cores along with 8-way SMT support for a total of 131,072 threads, twice as many cores as its predecessor.
Operating at 1.6 GHz, the PEZY-SC4 will have a peak performance of 105 TFLOPS (single-precision) and 52.5 TFLOPS (double-precision) while consuming around 640 Watts. The PEZY-SC4 is expected to be manufactured on TSMC's 5 nm process.
Cache[edit]
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This section is empty; you can help add the missing info by editing this page. |
Memory controller[edit]
For main memory, the PEZY-SC4 supports 4 channels of 64-bit DDR5-4000 memory with ECC support for a total aggregated bandwidth of 107.3 GiB/s
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Integrated Memory Controller
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In addition to main memory bandwidth, the PEZY-SC4 supports Wide-IO with a width of 4,096 bit, twice of the SC3. As with the SC3, the SC4 will use ThruChip Interface (TCI) interfaces in order to communicate with the TCI-DRAM chips. This chip incorporates 8 interfaces, operating at 3 GHz for a bandwidth of 2.8 TiB/s per interface for a total aggregated bandwidth of 22.35 TB/s - twice the bandwidth of its predecessor.
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Integrated Memory Controller
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Expansions[edit]
With the SC4, PEZY plans to expand on the custom optics interface that was designed for the PEZY-SC3 for up to 512 lanes.
base frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
core count | 16,384 + |
core voltage | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | PEZY + |
die area | 740 mm² (1.147 in², 7.4 cm², 740,000,000 µm²) + |
family | PEZY-SCx + |
first announced | 2016 + |
first launched | 2020 + |
full page name | pezy/pezy-scx/pezy-sc4 + |
has ecc memory support | true + and false + |
instance of | microprocessor + |
ldate | 3000 + |
manufacturer | TSMC + |
market segment | Supercomputer + |
max memory bandwidth | 119.2 GiB/s (122,060.8 MiB/s, 127.99 GB/s, 127,990.025 MB/s, 0.116 TiB/s, 0.128 TB/s) + and 22,886.4 GiB/s (23,435,673.6 MiB/s, 24,574.085 GB/s, 24,574,084.881 MB/s, 22.35 TiB/s, 24.574 TB/s) + |
max memory channels | 4 + and 8 + |
model number | PEZY-SC4 + |
name | PEZY-SC4 + |
peak flops (double-precision) | 52,428,800,000,000 FLOPS (52,428,800,000 KFLOPS, 52,428,800 MFLOPS, 52,428.8 GFLOPS, 52.429 TFLOPS, 0.0524 PFLOPS, 5.24288e-5 EFLOPS, 5.24288e-8 ZFLOPS) + |
peak flops (half-precision) | 209,715,200,000,000 FLOPS (209,715,200,000 KFLOPS, 209,715,200 MFLOPS, 209,715.2 GFLOPS, 209.715 TFLOPS, 0.21 PFLOPS, 2.097152e-4 EFLOPS, 2.097152e-7 ZFLOPS) + |
peak flops (single-precision) | 104,857,600,000,000 FLOPS (104,857,600,000 KFLOPS, 104,857,600 MFLOPS, 104,857.6 GFLOPS, 104.858 TFLOPS, 0.105 PFLOPS, 1.048576e-4 EFLOPS, 1.048576e-7 ZFLOPS) + |
power dissipation | 640 W (640,000 mW, 0.858 hp, 0.64 kW) + |
process | 5 nm (0.005 μm, 5.0e-6 mm) + |
supported memory type | DDR5-4000 + |
technology | CMOS + |
thread count | 131,072 + |