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Difference between revisions of "intel/celeron/837"
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{{intel title|Celeron 837}}
 
{{intel title|Celeron 837}}
−
{{mpu
+
{{chip
 
|name=Celeron 837
 
|name=Celeron 837
 
|no image=Yes
 
|no image=Yes
Line 13: Line 13:
 
|s-spec 3=SR0Q0
 
|s-spec 3=SR0Q0
 
|market=Mobile
 
|market=Mobile
 +
|first announced=2012
 +
|first launched=2012
 
|family=Celeron
 
|family=Celeron
 
|series=800
 
|series=800
Line 32: Line 34:
 
|core stepping=J1
 
|core stepping=J1
 
|process=32 nm
 
|process=32 nm
 +
|transistors=504,000,000
 
|technology=CMOS
 
|technology=CMOS
 +
|die area=131 mm²
 
|word size=64 bit
 
|word size=64 bit
 
|core count=2
 
|core count=2
Line 48: Line 52:
 
|package module 1={{packages/intel/fcbga-1023}}
 
|package module 1={{packages/intel/fcbga-1023}}
 
}}
 
}}
 +
'''Celeron 837''' is a [[dual-core]] budget mobile [[x86]] microprocessor introduced by [[Intel]] in [[2012]]. The Celeron 837, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1.8 GHz with a [[TDP]] of 17 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 350 MHz with a burst frequency of 800 MHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.
  
 
== Cache ==
 
== Cache ==
 +
{{main|intel/microarchitectures/sandy_bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}}
 +
{{cache size
 +
|l1 cache=128 KiB
 +
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=64 KiB
 +
|l1d break=2x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=512 KiB
 +
|l2 break=2x256 KiB
 +
|l2 desc=8-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=2 MiB
 +
|l3 break=2x1 MiB
 +
|l3 desc=8-way set associative
 +
|l3 policy=write-back
 +
}}
  
 
== Memory controller ==
 
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3-1333
 +
|type 2=DDR3-1066
 +
|ecc=No
 +
|max mem=16 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=19.87 GiB/s
 +
|bandwidth schan=9.93 GiB/s
 +
|bandwidth dchan=19.87 GiB/s
 +
}}
  
 
== Expansions ==
 
== Expansions ==
 +
{{expansions main
 +
|
 +
{{expansions entry
 +
|type=PCIe
 +
|pcie revision=2.0
 +
|pcie lanes=16
 +
|pcie config=1x16
 +
|pcie config 2=2x8
 +
|pcie config 3=1x8+2x4
 +
}}
 +
}}
  
 
== Graphics ==
 
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = HD Graphics (Sandy Bridge)
 +
| device id          = 0x0106
 +
| designer            = Intel
 +
| execution units    = 6
 +
| max displays        = 2
 +
| frequency          = 350 MHz
 +
| max frequency      = 800 MHz
 +
 +
| output crt          = Yes
 +
| output sdvo        = Yes
 +
| output dsi          =
 +
| output edp          = Yes
 +
| output dp          = Yes
 +
| output hdmi        = Yes
 +
| output vga          =
 +
| output dvi          =
 +
 +
| directx ver        = 10.1
 +
| opengl ver        = 3.1
 +
| opencl ver        =
 +
| hdmi ver          = 1.4
 +
| dp ver            = 1.1
 +
| edp ver            = 1.1
 +
 +
| features            = Yes
 +
| intel fdi            = Yes
 +
}}
 +
{{sandy bridge hardware accelerated video table|col=1}}
  
 
== Features ==
 
== Features ==
−
{{x86 features}}
+
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=No
 +
|avx2=No
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=No
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=Yes
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=Yes
 +
|fastmem=Yes
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=No
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=No
 +
|ept=No
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|intqat=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
}}
 +
 
 +
== Documents ==
 +
=== Datasheet ===
 +
* [[:File:2nd-gen-core-family-mobile-vol-1-datasheet.pdf|Datasheet, Volume 1]]
 +
* [[:File:2nd-gen-core-family-mobile-vol-2-datasheet.pdf|Datasheet, Volume 2]]
 +
=== Other ===
 +
* [[:File:2nd-gen-core-mobile-thermal-guide.pdf|Thermal Design Guide for Embedded Applications]]
 +
* [[:File:2nd-gen-core-family-mobile-specification-update.pdf|2nd Gen Core Mobile Specification Update]]

Latest revision as of 18:20, 17 March 2018

Edit Values
Celeron 837
General Info
DesignerIntel
ManufacturerIntel
Model Number837
Part NumberAV8062701080000,
AV8062701080001,
AV8062701080002
S-SpecSR07K, SR0EH, SR0Q0
MarketMobile
Introduction2012 (announced)
2012 (launched)
ShopAmazon
General Specs
FamilyCeleron
Series800
LockedYes
Frequency1,800 MHz
Bus typeDMI 2.0
Bus rate4 × 5 GT/s
Clock multiplier18
CPUID0x206A7
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSandy Bridge
PlatformSandy Bridge M
ChipsetCougar Point
Core NameSandy Bridge M
Core Family6
Core Model42
Core SteppingJ1
Process32 nm
Transistors504,000,000
TechnologyCMOS
Die131 mm²
Word Size64 bit
Cores2
Threads2
Max Memory16 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power (idle)2.3 W
Vcore0.3 V-1.52 V
TDP17 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCBGA-1023 (BGA)
Dimension31 mm x 24 mm
Pitch0.65 mm
Contacts1023

Celeron 837 is a dual-core budget mobile x86 microprocessor introduced by Intel in 2012. The Celeron 837, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1.8 GHz with a TDP of 17 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 350 MHz with a burst frequency of 800 MHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.

Cache[edit]

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back
L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB8-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333, DDR3-1066
Supports ECCNo
Max Mem16 GiB
Controllers1
Channels2
Max Bandwidth19.87 GiB/s
20,346.88 MiB/s
21.335 GB/s
21,335.25 MB/s
0.0194 TiB/s
0.0213 TB/s
Bandwidth
Single 9.93 GiB/s
Double 19.87 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 2.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics (Sandy Bridge)
DesignerIntelDevice ID0x0106
Execution Units6Max Displays2
Frequency350 MHz
0.35 GHz
350,000 KHz
Burst Frequency800 MHz
0.8 GHz
800,000 KHz
OutputDP, eDP, HDMI, SDVO, CRT
Standards
DirectX10.1
OpenGL3.1
DP1.1
eDP1.1
HDMI1.4
Additional Features
Intel Flexible Display Interface (FDI)

Features[edit]

Documents[edit]

Datasheet[edit]

Other[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/837&oldid=75288"
Facts about "Celeron 837 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron 837 - Intel#package + and Celeron 837 - Intel#pcie +
base frequency1,800 MHz (1.8 GHz, 1,800,000 kHz) +
bus links4 +
bus rate5,000 MT/s (5 GT/s, 5,000,000 kT/s) +
bus typeDMI 2.0 +
chipsetCougar Point +
clock multiplier18 +
core count2 +
core family6 +
core model42 +
core nameSandy Bridge M +
core steppingJ1 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.3 V (3 dV, 30 cV, 300 mV) +
cpuid0x206A7 +
designerIntel +
device id0x0106 +
die area131 mm² (0.203 in², 1.31 cm², 131,000,000 µm²) +
familyCeleron +
first announced2012 +
first launched2012 +
full page nameintel/celeron/837 +
has ecc memory supportfalse +
has featureEnhanced SpeedStep Technology +, Intel VT-x + and Flex Memory Access +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
instance ofmicroprocessor +
integrated gpuHD Graphics (Sandy Bridge) +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units6 +
integrated gpu max frequency800 MHz (0.8 GHz, 800,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description8-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldate2012 +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory bandwidth19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels2 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSandy Bridge +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number837 +
nameCeleron 837 +
packageFCBGA-1023 +
part numberAV8062701080000 +, AV8062701080001 + and AV8062701080002 +
platformSandy Bridge M +
power dissipation (idle)2.3 W (2,300 mW, 0.00308 hp, 0.0023 kW) +
process32 nm (0.032 μm, 3.2e-5 mm) +
s-specSR07K +, SR0EH + and SR0Q0 +
series800 +
smp max ways1 +
supported memory typeDDR3-1333 + and DDR3-1066 +
tdp17 W (17,000 mW, 0.0228 hp, 0.017 kW) +
technologyCMOS +
thread count2 +
transistor count504,000,000 +
word size64 bit (8 octets, 16 nibbles) +