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Difference between revisions of "intel/celeron/b720"
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{{intel title|Celeron B720}}
 
{{intel title|Celeron B720}}
−
{{mpu
+
{{chip
 
|name=Celeron B720
 
|name=Celeron B720
 
|no image=Yes
 
|no image=Yes
Line 9: Line 9:
 
|s-spec=SR0EA
 
|s-spec=SR0EA
 
|market=Mobile
 
|market=Mobile
 +
|first announced=January, 2012
 +
|first launched=January, 2012
 +
|release price=$70
 
|family=Celeron
 
|family=Celeron
 
|series=700
 
|series=700
Line 26: Line 29:
 
|core family=6
 
|core family=6
 
|core model=42
 
|core model=42
 +
|core stepping=Q0
 
|process=32 nm
 
|process=32 nm
 
|transistors=504,000,000
 
|transistors=504,000,000
Line 45: Line 49:
 
|package module 1={{packages/intel/pga-988b}}
 
|package module 1={{packages/intel/pga-988b}}
 
}}
 
}}
 +
'''Celeron B720''' is a [[single-core]] budget mobile [[x86]] microprocessor introduced by [[Intel]] in early [[2012]]. The Celeron B720, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1.7 GHz with a [[TDP]] of 35 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 650 MHz with a burst frequency of 1 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.
  
 
== Cache ==
 
== Cache ==
 +
{{main|intel/microarchitectures/sandy_bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}}
 +
{{cache size
 +
|l1 cache=64 KiB
 +
|l1i cache=32 KiB
 +
|l1i break=1x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=32 KiB
 +
|l1d break=1x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=256 KiB
 +
|l2 break=1x256 KiB
 +
|l2 desc=8-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=1.5 MiB
 +
|l3 break=1x1.5 MiB
 +
|l3 desc=12-way set associative
 +
|l3 policy=write-back
 +
}}
  
 
== Memory controller ==
 
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3-1333
 +
|type 2=DDR3-1066
 +
|ecc=No
 +
|max mem=16 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=19.87 GiB/s
 +
|bandwidth schan=9.93 GiB/s
 +
|bandwidth dchan=19.87 GiB/s
 +
}}
  
 
== Expansions ==
 
== Expansions ==
 +
{{expansions main
 +
|
 +
{{expansions entry
 +
|type=PCIe
 +
|pcie revision=2.0
 +
|pcie lanes=16
 +
|pcie config=1x16
 +
|pcie config 2=2x8
 +
|pcie config 3=1x8+2x4
 +
}}
 +
}}
  
 
== Graphics ==
 
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = HD Graphics (Sandy Bridge)
 +
| device id          = 0x0106
 +
| designer            = Intel
 +
| execution units    = 6
 +
| max displays        = 2
 +
| frequency          = 650 MHz
 +
| max frequency      = 1,000 MHz
 +
 +
| output crt          = Yes
 +
| output sdvo        = Yes
 +
| output dsi          =
 +
| output edp          = Yes
 +
| output dp          = Yes
 +
| output hdmi        = Yes
 +
| output vga          =
 +
| output dvi          =
 +
 +
| directx ver        = 10.1
 +
| opengl ver        = 3.1
 +
| opencl ver        =
 +
| hdmi ver          = 1.4
 +
| dp ver            = 1.1
 +
| edp ver            = 1.1
 +
 +
| features            = Yes
 +
| intel fdi            = Yes
 +
}}
 +
{{sandy bridge hardware accelerated video table|col=1}}
  
 
== Features ==
 
== Features ==
−
{{x86 features}}
+
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=No
 +
|avx2=No
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=No
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=Yes
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=Yes
 +
|fastmem=Yes
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=No
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=No
 +
|ept=No
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|intqat=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
}}
 +
 
 +
== Documents ==
 +
=== Datasheet ===
 +
* [[:File:2nd-gen-core-family-mobile-vol-1-datasheet.pdf|Datasheet, Volume 1]]
 +
* [[:File:2nd-gen-core-family-mobile-vol-2-datasheet.pdf|Datasheet, Volume 2]]
 +
=== Other ===
 +
* [[:File:2nd-gen-core-mobile-thermal-guide.pdf|Thermal Design Guide for Embedded Applications]]
 +
* [[:File:2nd-gen-core-family-mobile-specification-update.pdf|2nd Gen Core Mobile Specification Update]]

Latest revision as of 18:21, 17 March 2018

Edit Values
Celeron B720
General Info
DesignerIntel
ManufacturerIntel
Model NumberB720
Part NumberFF8062701084101
S-SpecSR0EA
MarketMobile
IntroductionJanuary, 2012 (announced)
January, 2012 (launched)
Release Price$70
ShopAmazon
General Specs
FamilyCeleron
Series700
LockedYes
Frequency1,700 MHz
Bus typeDMI 2.0
Bus rate4 × 5 GT/s
Clock multiplier17
CPUID0x206A7
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSandy Bridge
PlatformSandy Bridge M
ChipsetCougar Point
Core NameSandy Bridge M
Core Family6
Core Model42
Core SteppingQ0
Process32 nm
Transistors504,000,000
TechnologyCMOS
Die131 mm²
Word Size64 bit
Cores1
Threads1
Max Memory16 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power (idle)3.1 W
Vcore0.3 V-1.52 V
TDP35 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackagerPGA988B (PGA)
Dimension37.5 mm x 37.5 mm
Pitch1 mm
Contacts988
SocketSocket G2

Celeron B720 is a single-core budget mobile x86 microprocessor introduced by Intel in early 2012. The Celeron B720, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1.7 GHz with a TDP of 35 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 650 MHz with a burst frequency of 1 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.

Cache[edit]

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$64 KiB
65,536 B
0.0625 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associative 
L1D$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associativewrite-back
L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x256 KiB8-way set associativewrite-back
L3$1.5 MiB
1,536 KiB
1,572,864 B
0.00146 GiB
  1x1.5 MiB12-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333, DDR3-1066
Supports ECCNo
Max Mem16 GiB
Controllers1
Channels2
Max Bandwidth19.87 GiB/s
20,346.88 MiB/s
21.335 GB/s
21,335.25 MB/s
0.0194 TiB/s
0.0213 TB/s
Bandwidth
Single 9.93 GiB/s
Double 19.87 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 2.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics (Sandy Bridge)
DesignerIntelDevice ID0x0106
Execution Units6Max Displays2
Frequency650 MHz
0.65 GHz
650,000 KHz
Burst Frequency1,000 MHz
1 GHz
1,000,000 KHz
OutputDP, eDP, HDMI, SDVO, CRT
Standards
DirectX10.1
OpenGL3.1
DP1.1
eDP1.1
HDMI1.4
Additional Features
Intel Flexible Display Interface (FDI)

Features[edit]

Documents[edit]

Datasheet[edit]

Other[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/b720&oldid=75298"
Facts about "Celeron B720 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron B720 - Intel#package + and Celeron B720 - Intel#pcie +
base frequency1,700 MHz (1.7 GHz, 1,700,000 kHz) +
bus links4 +
bus rate5,000 MT/s (5 GT/s, 5,000,000 kT/s) +
bus typeDMI 2.0 +
chipsetCougar Point +
clock multiplier17 +
core count1 +
core family6 +
core model42 +
core nameSandy Bridge M +
core steppingQ0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.3 V (3 dV, 30 cV, 300 mV) +
cpuid0x206A7 +
designerIntel +
device id0x0106 +
die area131 mm² (0.203 in², 1.31 cm², 131,000,000 µm²) +
familyCeleron +
first announcedJanuary 2012 +
first launchedJanuary 2012 +
full page nameintel/celeron/b720 +
has ecc memory supportfalse +
has featureEnhanced SpeedStep Technology +, Intel VT-x + and Flex Memory Access +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
instance ofmicroprocessor +
integrated gpuHD Graphics (Sandy Bridge) +
integrated gpu base frequency650 MHz (0.65 GHz, 650,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units6 +
integrated gpu max frequency1,000 MHz (1 GHz, 1,000,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size64 KiB (65,536 B, 0.0625 MiB) +
l1d$ description8-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description8-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description8-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l3$ description12-way set associative +
l3$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
ldateJanuary 2012 +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory bandwidth19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels2 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSandy Bridge +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberB720 +
nameCeleron B720 +
packagerPGA988B +
part numberFF8062701084101 +
platformSandy Bridge M +
power dissipation (idle)3.1 W (3,100 mW, 0.00416 hp, 0.0031 kW) +
process32 nm (0.032 μm, 3.2e-5 mm) +
release price$ 70.00 (€ 63.00, £ 56.70, ¥ 7,233.10) +
s-specSR0EA +
series700 +
smp max ways1 +
socketSocket G2 +
supported memory typeDDR3-1333 + and DDR3-1066 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count1 +
transistor count504,000,000 +
word size64 bit (8 octets, 16 nibbles) +