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Difference between revisions of "intel/atom/c3708"
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{{intel title|Atom C3708}} | {{intel title|Atom C3708}} | ||
− | {{ | + | {{chip |
|name=Atom C3708 | |name=Atom C3708 | ||
|image=denverton (front).png | |image=denverton (front).png | ||
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|core name=Denverton | |core name=Denverton | ||
|core family=6 | |core family=6 | ||
+ | |core model=95 | ||
|core stepping=B1 | |core stepping=B1 | ||
|process=14 nm | |process=14 nm | ||
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|package module 1={{packages/intel/fcbga-1310}} | |package module 1={{packages/intel/fcbga-1310}} | ||
}} | }} | ||
− | '''Atom C3708''' is a {{arch|64}} [[octa-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3708, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 1.7 GHz with a [[TDP]] of 17 W. The C3708 supports up to | + | '''Atom C3708''' is a {{arch|64}} [[octa-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3708, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 1.7 GHz with a [[TDP]] of 17 W. The C3708 supports up to 256 GiB of dual-channel DDR4-2133 [[ECC]] memory. This model is part of {{intel|Denverton|l=core}}'s [[part of::Internet of Things and eTEMP SKUs]] which come with integrated {{intel|QuickAssist Technology}} and support extended ambient operating temperature (-40 °C to 85 °C). |
== Cache == | == Cache == | ||
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== Expansions == | == Expansions == | ||
+ | This chip incorporates 20 high-speed I/O (HSIO) lanes that may be configured as any combination of the following: | ||
{{expansions main | {{expansions main | ||
| | | | ||
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|type=PCIe | |type=PCIe | ||
|pcie revision=3.0 | |pcie revision=3.0 | ||
− | |pcie lanes= | + | |pcie lanes=16 |
|pcie config=x8 | |pcie config=x8 | ||
|pcie config 2=x4 | |pcie config 2=x4 | ||
|pcie config 3=x2 | |pcie config 3=x2 | ||
+ | |pcie config 4=x1 | ||
}} | }} | ||
{{expansions entry | {{expansions entry | ||
Line 95: | Line 98: | ||
|sata revision=3.0 | |sata revision=3.0 | ||
|sata ports=16 | |sata ports=16 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=HSIO | ||
+ | |hsio lanes=20 | ||
}} | }} | ||
+ | }} | ||
+ | |||
+ | == Networking == | ||
+ | {{network | ||
+ | |eth opts=Yes | ||
+ | |10ge=Yes | ||
+ | |10ge ports=4 | ||
}} | }} | ||
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|securekey=No | |securekey=No | ||
|osguard=No | |osguard=No | ||
+ | |intqat=Yes | ||
|3dnow=No | |3dnow=No | ||
|e3dnow=No | |e3dnow=No | ||
Line 190: | Line 205: | ||
|xfr=No | |xfr=No | ||
}} | }} | ||
+ | |||
+ | * Intel's Integrated {{intel|QuickAssist Technology}} supports a rate of up to 10 Gbps. |
Latest revision as of 00:12, 15 August 2019
Edit Values | |||||||||||
Atom C3708 | |||||||||||
General Info | |||||||||||
Designer | Intel | ||||||||||
Manufacturer | Intel | ||||||||||
Model Number | C3708 | ||||||||||
Part Number | HW8076502640002 | ||||||||||
S-Spec | SR38F | ||||||||||
Market | Server, Embedded | ||||||||||
Introduction | August 15, 2017 (announced) August 15, 2017 (launched) | ||||||||||
Release Price | $209.00 | ||||||||||
Shop | Amazon | ||||||||||
General Specs | |||||||||||
Family | Atom | ||||||||||
Series | 3000 | ||||||||||
Locked | Yes | ||||||||||
Frequency | 1,700 MHz | ||||||||||
Clock multiplier | 17 | ||||||||||
Microarchitecture | |||||||||||
ISA | x86-64 (x86) | ||||||||||
Microarchitecture | Goldmont | ||||||||||
Core Name | Denverton | ||||||||||
Core Family | 6 | ||||||||||
Core Model | 95 | ||||||||||
Core Stepping | B1 | ||||||||||
Process | 14 nm | ||||||||||
Technology | CMOS | ||||||||||
Word Size | 64 bit | ||||||||||
Cores | 8 | ||||||||||
Threads | 8 | ||||||||||
Max Memory | 256 GiB | ||||||||||
Multiprocessing | |||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||
Electrical | |||||||||||
TDP | 17 W | ||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||
Tcase | 0 °C – 85 °C | ||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||
Tambient | -40 °C – 85 °C | ||||||||||
Packaging | |||||||||||
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Atom C3708 is a 64-bit octa-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3708, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 1.7 GHz with a TDP of 17 W. The C3708 supports up to 256 GiB of dual-channel DDR4-2133 ECC memory. This model is part of Denverton's Internet of Things and eTEMP SKUs which come with integrated QuickAssist Technology and support extended ambient operating temperature (-40 °C to 85 °C).
Cache[edit]
- Main article: Goldmont § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
This chip incorporates 20 high-speed I/O (HSIO) lanes that may be configured as any combination of the following:
Expansion Options |
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Networking[edit]
Networking
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- Intel's Integrated QuickAssist Technology supports a rate of up to 10 Gbps.
Facts about "Atom C3708 - Intel"
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Memory Protection Extensions + |
has intel enhanced speedstep technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
l1$ size | 448 KiB (458,752 B, 0.438 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
part of | Internet of Things and eTEMP SKUs + |
supported memory type | DDR3L-1600 + and DDR4-2133 + |
x86/has memory protection extensions | true + |