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Difference between revisions of "intel/atom/c3338"
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{{intel title|Atom C3338}}
 
{{intel title|Atom C3338}}
−
{{mpu
+
{{chip
 
|name=Atom C3338
 
|name=Atom C3338
−
|no image=Yes
+
|image=denverton (front).png
 
|designer=Intel
 
|designer=Intel
 
|manufacturer=Intel
 
|manufacturer=Intel
 
|model number=C3338
 
|model number=C3338
 
|part number=HW8076502639602
 
|part number=HW8076502639602
−
|s-spec=SR38B
+
|s-spec=SR36E
 +
|s-spec 2=SR38B
 
|market=Server
 
|market=Server
 
|market 2=Embedded
 
|market 2=Embedded
Line 24: Line 25:
 
|core name=Denverton
 
|core name=Denverton
 
|core family=6
 
|core family=6
−
|core stepping=B1
+
|core model=95
 +
|core stepping=B0
 +
|core stepping 2=B1
 
|process=14 nm
 
|process=14 nm
 
|technology=CMOS
 
|technology=CMOS
Line 41: Line 44:
 
|package module 1={{packages/intel/fcbga-1310}}
 
|package module 1={{packages/intel/fcbga-1310}}
 
}}
 
}}
−
'''Atom C3338''' is a {{arch|64}} [[dual-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3338, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 1.5 GHz with a [[TDP]] of 9 W and a {{intel|turbo boost}} frequency of up to 2.2 GHz. The C3338 supports up to a single channel of 128 GiB of DDR4-1866 [[ECC]] memory.
+
'''Atom C3338''' is a {{arch|64}} [[dual-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3338, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 1.5 GHz with a [[TDP]] of 9 W and a {{intel|turbo boost}} frequency of up to 2.2 GHz. The C3338 supports up to 128 GiB of single channel DDR4-1866 [[ECC]] memory. This model is part of {{intel|Denverton|l=core}}'s [[part of::Network and Enterprise Storage SKUs]].
 +
 
 +
== Cache ==
 +
{{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont § Cache}}
 +
{{cache size
 +
|l1 cache=112 KiB
 +
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1i policy=write-back
 +
|l1d cache=48 KiB
 +
|l1d break=2x24 KiB
 +
|l1d desc=6-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=4 MiB
 +
|l2 break=2x2 MiB
 +
|l2 desc=16-way set associative
 +
|l2 policy=write-back
 +
}}
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3L-1600
 +
|type 2=DDR4-1866
 +
|ecc=Yes
 +
|max mem=128 GiB
 +
|controllers=1
 +
|channels=1
 +
|max bandwidth=13.91 GiB/s
 +
|bandwidth schan=13.91 GiB/s
 +
}}
 +
 
 +
== Expansions ==
 +
This chip incorporates 10 high-speed I/O (HSIO) lanes that may be configured as any combination of the following:
 +
{{expansions main
 +
|
 +
{{expansions entry
 +
|type=PCIe
 +
|pcie revision=3.0
 +
|pcie lanes=10
 +
|pcie config=x8
 +
|pcie config 2=x4
 +
|pcie config 3=x2
 +
|pcie config 4=x1
 +
}}
 +
{{expansions entry
 +
|type=USB
 +
|usb revision=3.0
 +
|usb ports=8
 +
}}
 +
{{expansions entry
 +
|type=SATA
 +
|sata revision=3.0
 +
|sata ports=10
 +
}}
 +
{{expansions entry
 +
|type=HSIO
 +
|hsio lanes=10
 +
}}
 +
}}
 +
 
 +
== Networking ==
 +
{{network
 +
|eth opts=Yes
 +
|2.5ge=Yes
 +
|2.5ge ports=4
 +
}}
 +
 
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=No
 +
|avx2=No
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=Yes
 +
|xop=No
 +
|adx=No
 +
|clmul=No
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=Yes
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=No
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
}}

Latest revision as of 00:44, 15 August 2019

Edit Values
Atom C3338
denverton (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberC3338
Part NumberHW8076502639602
S-SpecSR36E, SR38B
MarketServer, Embedded
IntroductionFebruary 22, 2017 (announced)
February 22, 2017 (launched)
Release Price$27.00
ShopAmazon
General Specs
FamilyAtom
Series3000
LockedYes
Frequency1,500 MHz
Turbo Frequency2,200 MHz (1 core)
Clock multiplier15
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureGoldmont
Core NameDenverton
Core Family6
Core Model95
Core SteppingB0, B1
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores2
Threads2
Max Memory128 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP9 W
Tjunction0 °C – 100 °C
Tcase0 °C – 89 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCBGA-1310 (BGA)
Dimension34 mm x 28 mm
Ball Count1310
Ball CompSAC405
InterconnectBGA-1310

Atom C3338 is a 64-bit dual-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3338, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 1.5 GHz with a TDP of 9 W and a turbo boost frequency of up to 2.2 GHz. The C3338 supports up to 128 GiB of single channel DDR4-1866 ECC memory. This model is part of Denverton's Network and Enterprise Storage SKUs.

Cache[edit]

Main article: Goldmont § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$112 KiB
114,688 B
0.109 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L1D$48 KiB
49,152 B
0.0469 MiB
2x24 KiB6-way set associativewrite-back
L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB16-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-1866
Supports ECCYes
Max Mem128 GiB
Controllers1
Channels1
Max Bandwidth13.91 GiB/s
14,243.84 MiB/s
14.936 GB/s
14,935.749 MB/s
0.0136 TiB/s
0.0149 TB/s
Bandwidth
Single 13.91 GiB/s

Expansions[edit]

This chip incorporates 10 high-speed I/O (HSIO) lanes that may be configured as any combination of the following:

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 10
Configuration: x8, x4, x2, x1
USBRevision: 3.0
Max Ports: 8
SATARevision: 3.0
Max Ports: 10
HSIOMax Lanes: 10


Networking[edit]

[Edit/Modify Network Info]

ethernet plug icon.svg
Networking
Ethernet
2.5GbEYes (Ports: 4)

Features[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/atom/c3338&oldid=93393"
Facts about "Atom C3338 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Atom C3338 - Intel#package + and Atom C3338 - Intel#pcie +
base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
clock multiplier15 +
core count2 +
core family6 +
core model95 +
core nameDenverton +
core steppingB0 + and B1 +
designerIntel +
familyAtom +
first announcedFebruary 22, 2017 +
first launchedFebruary 22, 2017 +
full page nameintel/atom/c3338 +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Memory Protection Extensions +
has intel enhanced speedstep technologytrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size112 KiB (114,688 B, 0.109 MiB) +
l1d$ description6-way set associative +
l1d$ size48 KiB (49,152 B, 0.0469 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldateFebruary 22, 2017 +
main imageFile:denverton (front).png +
manufacturerIntel +
market segmentServer + and Embedded +
max case temperature362.15 K (89 °C, 192.2 °F, 651.87 °R) +
max cpu count1 +
max hsio lanes10 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth13.91 GiB/s (14,243.84 MiB/s, 14.936 GB/s, 14,935.749 MB/s, 0.0136 TiB/s, 0.0149 TB/s) +
max memory channels1 +
max sata ports10 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
max usb ports8 +
microarchitectureGoldmont +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberC3338 +
nameAtom C3338 +
packageFCBGA-1310 +
part numberHW8076502639602 +
part ofNetwork and Enterprise Storage SKUs +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 27.00 (€ 24.30, £ 21.87, ¥ 2,789.91) +
s-specSR36E + and SR38B +
series3000 +
smp max ways1 +
supported memory typeDDR3L-1600 + and DDR4-1866 +
tdp9 W (9,000 mW, 0.0121 hp, 0.009 kW) +
technologyCMOS +
thread count2 +
turbo frequency (1 core)2,200 MHz (2.2 GHz, 2,200,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +