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Difference between revisions of "intel/xeon gold/6152"
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{{intel title|Xeon Gold 6152}} | {{intel title|Xeon Gold 6152}} | ||
| − | {{ | + | {{chip |
|name=Xeon Gold 6152 | |name=Xeon Gold 6152 | ||
|image=skylake sp (basic).png | |image=skylake sp (basic).png | ||
| Line 15: | Line 15: | ||
|release price=$3655.00 | |release price=$3655.00 | ||
|family=Xeon Gold | |family=Xeon Gold | ||
| − | |series= | + | |series=6100 |
|locked=Yes | |locked=Yes | ||
|frequency=2,100 MHz | |frequency=2,100 MHz | ||
| Line 34: | Line 34: | ||
|core count=22 | |core count=22 | ||
|thread count=44 | |thread count=44 | ||
| + | |max memory=768 GiB | ||
|max cpus=4 | |max cpus=4 | ||
| − | | | + | |smp interconnect=UPI |
| + | |smp interconnect links=3 | ||
| + | |smp interconnect rate=10.4 GT/s | ||
|tdp=140 W | |tdp=140 W | ||
|tcase min=0 °C | |tcase min=0 °C | ||
|tcase max=92 °C | |tcase max=92 °C | ||
| − | |package | + | |dts min=0 °C |
| + | |dts max=98 °C | ||
| + | |package name 1=intel,fclga_3647 | ||
| + | |successor=Xeon Gold 6252 | ||
| + | |successor link=intel/xeon_gold/6252 | ||
}} | }} | ||
'''Xeon Gold 6152''' is a {{arch|64}} [[22-core]] [[x86]] multi-socket high performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6152, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 140 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory. | '''Xeon Gold 6152''' is a {{arch|64}} [[22-core]] [[x86]] multi-socket high performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6152, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 140 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory. | ||
| Line 252: | Line 259: | ||
|freq_avx512_21=2,000 MHz | |freq_avx512_21=2,000 MHz | ||
|freq_avx512_22=2,000 MHz | |freq_avx512_22=2,000 MHz | ||
| + | }} | ||
| + | |||
| + | == Benchmarks == | ||
| + | {{benchmarks main | ||
| + | | | ||
| + | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00358.html|test_timestamp=2017-10-16 01:45:46-0400|chip_count=2|core_count=44|copies_count=88|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)|SPECrate2017_int_base=210|SPECrate2017_int_peak=}} | ||
| + | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00359.html|test_timestamp=2017-10-12 05:59:17-0400|chip_count=2|core_count=44|thread_count=44|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)|SPECspeed2017_fp_base=114|SPECspeed2017_fp_peak=}} | ||
| + | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00360.html|test_timestamp=2017-10-16 07:22:47-0400|chip_count=2|core_count=44|copies_count=88|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)|SPECrate2017_fp_base=197|SPECrate2017_fp_peak=}} | ||
| + | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00478.html|test_timestamp=2017-10-12 02:57:28-0400|chip_count=2|core_count=44|thread_count=44|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)|SPECspeed2017_int_base=8.89|SPECspeed2017_int_peak=}} | ||
}} | }} | ||
[[Category:microprocessor models by intel based on skylake extreme core count die]] | [[Category:microprocessor models by intel based on skylake extreme core count die]] | ||
Latest revision as of 01:46, 29 December 2019
| Edit Values | |
| Xeon Gold 6152 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | 6152 |
| Part Number | BX806736152, CD8067303406000 |
| S-Spec | SR3B4 QMRZ (QS) |
| Market | Server |
| Introduction | April 25, 2017 (announced) July 11, 2017 (launched) |
| Release Price | $3655.00 |
| Shop | Amazon |
| General Specs | |
| Family | Xeon Gold |
| Series | 6100 |
| Locked | Yes |
| Frequency | 2,100 MHz |
| Turbo Frequency | 3,700 MHz (1 core) |
| Clock multiplier | 21 |
| CPUID | 0x50654 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Skylake (server) |
| Platform | Purley |
| Chipset | Lewisburg |
| Core Name | Skylake SP |
| Core Family | 6 |
| Core Stepping | H0 |
| Process | 14 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 22 |
| Threads | 44 |
| Max Memory | 768 GiB |
| Multiprocessing | |
| Max SMP | 4-Way (Multiprocessor) |
| Interconnect | UPI |
| Interconnect Links | 3 |
| Interconnect Rate | 10.4 GT/s |
| Electrical | |
| TDP | 140 W |
| Tcase | 0 °C – 92 °C |
| TDTS | 0 °C – 98 °C |
| Packaging | |
| Package | FCLGA-3647 (FCLGA) |
| Dimension | 76.16 mm × 56.6 mm |
| Pitch | 0.8585 mm × 0.9906 mm |
| Contacts | 3647 |
| Socket | Socket P, LGA-3647 |
| Succession | |
Xeon Gold 6152 is a 64-bit 22-core x86 multi-socket high performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6152, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.1 GHz with a TDP of 140 W and a turbo boost frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
Cache[edit]
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Frequencies[edit]
- See also: Intel's CPU Frequency Behavior
| Mode | Base | Turbo Frequency/Active Cores | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | ||
| Normal | 2,100 MHz | 3,700 MHz | 3,700 MHz | 3,500 MHz | 3,500 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,800 MHz | 2,800 MHz |
| AVX2 | 1,700 MHz | 3,600 MHz | 3,600 MHz | 3,400 MHz | 3,400 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,000 MHz | 3,000 MHz | 3,000 MHz | 3,000 MHz | 2,700 MHz | 2,700 MHz | 2,700 MHz | 2,700 MHz | 2,400 MHz | 2,400 MHz | 2,400 MHz | 2,400 MHz | 2,400 MHz | 2,400 MHz |
| AVX512 | 1,400 MHz | 3,500 MHz | 3,500 MHz | 3,300 MHz | 3,300 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,500 MHz | 2,500 MHz | 2,500 MHz | 2,500 MHz | 2,200 MHz | 2,200 MHz | 2,200 MHz | 2,200 MHz | 2,000 MHz | 2,000 MHz | 2,000 MHz | 2,000 MHz | 2,000 MHz | 2,000 MHz |
Benchmarks[edit]
Test: SPEC CPU2017
Tested: 2017-10-16 01:45:46-0400
Chips: 2, Cores: 44, Copies: 88
Vendor: HPE
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
Tested: 2017-10-16 01:45:46-0400
Chips: 2, Cores: 44, Copies: 88
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
SPECrate2017_int_base: 210
Test: SPEC CPU2017
Tested: 2017-10-12 05:59:17-0400
Chips: 2, Cores: 44, Threads: 44
Vendor: HPE
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
Tested: 2017-10-12 05:59:17-0400
Chips: 2, Cores: 44, Threads: 44
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
SPECspeed2017_fp_base: 114
Test: SPEC CPU2017
Tested: 2017-10-16 07:22:47-0400
Chips: 2, Cores: 44, Copies: 88
Vendor: HPE
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
Tested: 2017-10-16 07:22:47-0400
Chips: 2, Cores: 44, Copies: 88
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
SPECrate2017_fp_base: 197
Test: SPEC CPU2017
Tested: 2017-10-12 02:57:28-0400
Chips: 2, Cores: 44, Threads: 44
Vendor: HPE
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
Tested: 2017-10-12 02:57:28-0400
Chips: 2, Cores: 44, Threads: 44
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
SPECspeed2017_int_base: 8.89
Facts about "Xeon Gold 6152 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Gold 6152 - Intel#io + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has advanced vector extensions 512 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel speed shift technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| l1$ size | 1,408 KiB (1,441,792 B, 1.375 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 704 KiB (720,896 B, 0.688 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 704 KiB (720,896 B, 0.688 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 22 MiB (22,528 KiB, 23,068,672 B, 0.0215 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 30.25 MiB (30,976 KiB, 31,719,424 B, 0.0295 GiB) + |
| max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + |
| max memory channels | 6 + |
| max pcie lanes | 48 + |
| supported memory type | DDR4-2666 + |