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Difference between revisions of "intel/core i7/i7-8650u"
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{{intel title|Core i7-8650U}} | {{intel title|Core i7-8650U}} | ||
− | {{ | + | {{chip |
− | | future | + | |future=Yes |
− | | name | + | |name=Core i7-8650U |
− | | no image | + | |no image=Yes |
− | | image | + | |image=kaby lake r (front).png |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | | designer | + | |model number=i7-8650U |
− | | manufacturer | + | |part number=FJ8067703281718 |
− | | model number | + | |s-spec=SR3L8 |
− | | part number | + | |market=Mobile |
− | + | |first announced=August 21, 2017 | |
− | + | |first launched=August 21, 2017 | |
− | + | |release price=$409.00 | |
− | | s-spec | + | |family=Core i7 |
− | + | |series=i7-8000 | |
− | | market | + | |locked=Yes |
− | | first announced | + | |frequency=1,900 MHz |
− | | first launched | + | |turbo frequency1=4,200 MHz |
− | + | |turbo frequency2=4,200 MHz | |
− | + | |turbo frequency3=3,900 MHz | |
− | | release price | + | |turbo frequency4=3,900 MHz |
− | + | |turbo frequency=Yes | |
− | | family | + | |bus type=OPI |
− | | series | + | |bus rate=4 GT/s |
− | | locked | + | |clock multiplier=19 |
− | | frequency | + | |isa=x86-64 |
− | + | |isa family=x86 | |
− | | turbo frequency1 | + | |microarch=Kaby Lake |
− | | turbo frequency2 | + | |platform=Kaby Lake |
− | | turbo frequency3 | + | |core name=Kaby Lake R |
− | | turbo frequency4 | + | |core family=6 |
− | | | + | |core model=142 |
− | | bus | + | |core stepping=Y0 |
− | | bus rate | + | |process=14 nm |
− | + | |technology=CMOS | |
− | | clock multiplier | + | |die area=123 mm² |
− | + | |word size=64 bit | |
− | + | |core count=4 | |
− | | isa | + | |thread count=8 |
− | | isa | + | |max cpus=1 |
− | | microarch | + | |max memory=32 GiB |
− | | platform | + | |v core min=0.55 V |
− | + | |v core max=1.52 V | |
− | | core name | + | |tdp=15 W |
− | | core family | + | |ctdp down=10 W |
− | | core model | + | |ctdp down frequency=800 MHz |
− | | core stepping | + | |ctdp up=25 W |
− | | process | + | |ctdp up frequency=2,100 MHz |
− | + | |tjunc min=0 °C | |
− | | technology | + | |tjunc max=100 °C |
− | | die area | + | |tstorage min=-25 °C |
− | + | |tstorage max=125 °C | |
− | + | |package module 1={{packages/intel/fcbga-1356}} | |
− | | word size | ||
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
− | |||
− | |||
− | | v core min | ||
− | | v core max | ||
− | |||
− | |||
− | |||
− | |||
− | | tdp | ||
− | | ctdp down | ||
− | | ctdp down frequency = | ||
− | | ctdp up | ||
− | | ctdp up frequency | ||
− | | tjunc min | ||
− | | tjunc max | ||
− | |||
− | |||
− | | tstorage min | ||
− | | tstorage max | ||
− | |||
− | |||
− | |||
− | |||
− | | package | ||
− | |||
− | |||
− | |||
− | |||
− | |||
}} | }} | ||
− | '''Core i7-8650U''' is a {{arch|64}} [[quad-core]] performance [[x86]] mobile microprocessor | + | '''Core i7-8650U''' is a {{arch|64}} [[quad-core]] performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2017]]. This processor, which is based on an enhanced version of the {{intel|Kaby Lake|l=arch}} microarchitecture, is manufactured on Intel's 2nd generation enhanced [[14 nm process|14nm+ process]]. The i7-8650U operates at 1.9 GHz with a TDP of 15 W and {{intel|Turbo Boost}} frequency of up to 4.2 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Intel's {{intel|UHD Graphics 620}} [[IGP]] operating at 300 MHz with a burst frequency of 1.15 GHz. |
− | |||
− | |||
− | {{ | ||
+ | This model has a configurable TDP-down of 10 W at 800 MHz and a TDP-up of 25 W at 2.1 GHz. | ||
== Cache == | == Cache == | ||
− | {{main|intel/microarchitectures/ | + | {{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} |
{{cache size | {{cache size | ||
|l1 cache=256 KiB | |l1 cache=256 KiB | ||
Line 117: | Line 81: | ||
== Memory controller == | == Memory controller == | ||
{{memory controller | {{memory controller | ||
− | |type= | + | |type=DDR4-2400 |
− | |type 2= | + | |type 2=LPDDR3-2133 |
− | |||
|ecc=No | |ecc=No | ||
|max mem=32 GiB | |max mem=32 GiB | ||
|controllers=1 | |controllers=1 | ||
|channels=2 | |channels=2 | ||
− | |max bandwidth= | + | |max bandwidth=35.76 GiB/s |
− | |bandwidth schan= | + | |bandwidth schan=17.88 GiB/s |
− | |bandwidth dchan= | + | |bandwidth dchan=35.76 GiB/s |
}} | }} | ||
== Expansions == | == Expansions == | ||
− | {{expansions | + | {{expansions main |
− | | pcie revision | + | | |
− | | pcie lanes | + | {{expansions entry |
− | | pcie config | + | |type=PCIe |
− | | pcie config 2 | + | |pcie revision=3.0 |
− | | pcie config 3 | + | |pcie lanes=12 |
− | | pcie config 4 | + | |pcie config=1x4 |
+ | |pcie config 2=2x2 | ||
+ | |pcie config 3=1x2+2x1 | ||
+ | |pcie config 4=4x1 | ||
+ | }} | ||
}} | }} | ||
== Graphics == | == Graphics == | ||
− | {{ | + | {{integrated graphics |
+ | | gpu = UHD Graphics 620 | ||
+ | | device id = 0x5917 | ||
+ | | designer = Intel | ||
+ | | execution units = 24 | ||
+ | | max displays = 3 | ||
+ | | max memory = 32 GiB | ||
+ | | frequency = 300 MHz | ||
+ | | max frequency = 1,150 MHz | ||
+ | |||
+ | | output crt = | ||
+ | | output sdvo = | ||
+ | | output dsi = | ||
+ | | output edp = Yes | ||
+ | | output dp = Yes | ||
+ | | output hdmi = Yes | ||
+ | | output vga = | ||
+ | | output dvi = Yes | ||
+ | |||
+ | | directx ver = 12 | ||
+ | | opengl ver = 4.4 | ||
+ | | opencl ver = 2.0 | ||
+ | | hdmi ver = 1.4a | ||
+ | | dp ver = 1.2 | ||
+ | | edp ver = 1.4 | ||
+ | | max res hdmi = 4096x2304 | ||
+ | | max res hdmi freq = 24 Hz | ||
+ | | max res dp = 4096x2304 | ||
+ | | max res dp freq = 60 Hz | ||
+ | | max res edp = 4096x2304 | ||
+ | | max res edp freq = 60 Hz | ||
+ | | max res vga = | ||
+ | | max res vga freq = | ||
+ | |||
+ | | features = Yes | ||
+ | | intel quick sync = Yes | ||
+ | | intel intru 3d = Yes | ||
+ | | intel insider = | ||
+ | | intel widi = | ||
+ | | intel fdi = | ||
+ | | intel clear video = Yes | ||
+ | | intel clear video hd = Yes | ||
+ | }} | ||
+ | {{kaby lake hardware accelerated video table|col=1}} | ||
== Features == | == Features == | ||
Line 152: | Line 162: | ||
|x8664=Yes | |x8664=Yes | ||
|nx=Yes | |nx=Yes | ||
− | |||
− | |||
|mmx=Yes | |mmx=Yes | ||
|emmx=Yes | |emmx=Yes | ||
Line 162: | Line 170: | ||
|sse41=Yes | |sse41=Yes | ||
|sse42=Yes | |sse42=Yes | ||
− | |sse4a= | + | |sse4a=Yes |
|avx=Yes | |avx=Yes | ||
|avx2=Yes | |avx2=Yes | ||
− | + | |avx512f=No | |
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No | ||
Line 187: | Line 206: | ||
|flex=Yes | |flex=Yes | ||
|fastmem=No | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
|isrt=Yes | |isrt=Yes | ||
|sba=No | |sba=No | ||
|mwt=Yes | |mwt=Yes | ||
− | |sipp= | + | |sipp=No |
|att=No | |att=No | ||
− | |ipt= | + | |ipt=Yes |
− | |tsx= | + | |tsx=No |
− | |txt= | + | |txt=No |
|ht=Yes | |ht=Yes | ||
− | |vpro= | + | |vpro=No |
|vtx=Yes | |vtx=Yes | ||
|vtd=Yes | |vtd=Yes | ||
Line 204: | Line 230: | ||
|securekey=Yes | |securekey=Yes | ||
|osguard=Yes | |osguard=Yes | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
|smartmp=No | |smartmp=No | ||
|powernow=No | |powernow=No | ||
+ | |amdvi=No | ||
|amdv=No | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
|rvi=No | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
}} | }} | ||
+ | |||
+ | == Die Shot == | ||
+ | {{see also|intel/microarchitectures/kaby_lake#Die|l1=Kaby Lake § Die Shot}} | ||
+ | A die shot of Intel's Kaby Lake R [[Quad Core]] mobile processors: | ||
+ | |||
+ | * [[14 nm process|14 nm+ process]] | ||
+ | * 11 metal layers | ||
+ | * 123 mm² die size | ||
+ | * 4 CPU cores + 24 GPU EUs | ||
+ | |||
+ | |||
+ | : [[File:kaby lake r die shot.png|650px]] | ||
+ | |||
+ | |||
+ | : [[File:kaby lake r die shot (annotated).png|650px]] |
Latest revision as of 15:38, 23 November 2018
Edit Values | |||||||||||||
Core i7-8650U | |||||||||||||
General Info | |||||||||||||
Designer | Intel | ||||||||||||
Manufacturer | Intel | ||||||||||||
Model Number | i7-8650U | ||||||||||||
Part Number | FJ8067703281718 | ||||||||||||
S-Spec | SR3L8 | ||||||||||||
Market | Mobile | ||||||||||||
Introduction | August 21, 2017 (announced) August 21, 2017 (launched) | ||||||||||||
Release Price | $409.00 | ||||||||||||
Shop | Amazon | ||||||||||||
General Specs | |||||||||||||
Family | Core i7 | ||||||||||||
Series | i7-8000 | ||||||||||||
Locked | Yes | ||||||||||||
Frequency | 1,900 MHz | ||||||||||||
Turbo Frequency | Yes | ||||||||||||
Turbo Frequency | 4,200 MHz (1 core), 4,200 MHz (2 cores), 3,900 MHz (3 cores), 3,900 MHz (4 cores) | ||||||||||||
Bus type | OPI | ||||||||||||
Bus rate | 4 GT/s | ||||||||||||
Clock multiplier | 19 | ||||||||||||
Microarchitecture | |||||||||||||
ISA | x86-64 (x86) | ||||||||||||
Microarchitecture | Kaby Lake | ||||||||||||
Platform | Kaby Lake | ||||||||||||
Core Name | Kaby Lake R | ||||||||||||
Core Family | 6 | ||||||||||||
Core Model | 142 | ||||||||||||
Core Stepping | Y0 | ||||||||||||
Process | 14 nm | ||||||||||||
Technology | CMOS | ||||||||||||
Die | 123 mm² | ||||||||||||
Word Size | 64 bit | ||||||||||||
Cores | 4 | ||||||||||||
Threads | 8 | ||||||||||||
Max Memory | 32 GiB | ||||||||||||
Multiprocessing | |||||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||||
Electrical | |||||||||||||
Vcore | 0.55 V-1.52 V | ||||||||||||
TDP | 15 W | ||||||||||||
cTDP down | 10 W | ||||||||||||
cTDP down frequency | 800 MHz | ||||||||||||
cTDP up | 25 W | ||||||||||||
cTDP up frequency | 2,100 MHz | ||||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||||
Packaging | |||||||||||||
|
Core i7-8650U is a 64-bit quad-core performance x86 mobile microprocessor introduced by Intel in mid-2017. This processor, which is based on an enhanced version of the Kaby Lake microarchitecture, is manufactured on Intel's 2nd generation enhanced 14nm+ process. The i7-8650U operates at 1.9 GHz with a TDP of 15 W and Turbo Boost frequency of up to 4.2 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Intel's UHD Graphics 620 IGP operating at 300 MHz with a burst frequency of 1.15 GHz.
This model has a configurable TDP-down of 10 W at 800 MHz and a TDP-up of 25 W at 2.1 GHz.
Cache[edit]
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options |
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Graphics[edit]
Integrated Graphics Information
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[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Die Shot[edit]
- See also: Kaby Lake § Die Shot
A die shot of Intel's Kaby Lake R Quad Core mobile processors:
- 14 nm+ process
- 11 metal layers
- 123 mm² die size
- 4 CPU cores + 24 GPU EUs
Facts about "Core i7-8650U - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i7-8650U - Intel#io + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology + and Stable Image Platform Program + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel my wifi technology support | true + |
has intel secure key technology | true + |
has intel smart response technology support | true + |
has intel speed shift technology | true + |
has intel stable image platform program support | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 12 + |
supported memory type | LPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |