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Difference between revisions of "vti/vl86cx/vy86c610"
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Latest revision as of 16:32, 13 December 2017

Edit Values
VY86C610
General Info
DesignerARM Holdings
ManufacturerVLSI Technology
Model NumberVY86C610
Part NumberVY86C61020BC,
VY86C610-25
MarketEmbedded, Desktop
Introduction1993 (launched)
Release Price$25
General Specs
FamilyVL86Cx
Frequency20 MHz, 25 MHz
Microarchitecture
ISAARMv3 (ARM)
MicroarchitectureARM6
ChipsetMEMC, VIDC, IOC
Core NameARM610
Process0.8 µm
Transistors358,931
TechnologyCMOS
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Max Address Mem0xFFFFFFFF
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore5 V ± 5 %
Tstorage-65 °C – -150 °C
Tambient-10 °C – 70 °C
Packaging
PackageTQFP-144 (TQFP)
Dimension20 mm x 20 mm x 1.6 mm
Pitch0.5 mm
Pin Count144

VY86C610 is a 32-bit ARM microprocessor designed by ARM and introduce by VTI in 1993. This processor is based on the ARM6 microarchitecture (ARM610 core) which was manufactured on VLSI's 0.8 µm process and operated at 20 MHz and 25 MHz.

This processor, unlike its ARM60 variant which only incorporate the bare bone core, includes a cache, write buffer, and a memory management unit.

Cache[edit]

Main article: ARM6 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$4 KiB
4,096 B
0.00391 MiB
  1x4 KiB64-way set associativewrite-through

Datasheet[edit]

Facts about "VY86C610 - VTI"
l1$ description64-way set associative +
l1$ size4 KiB (4,096 B, 0.00391 MiB) +