Difference between revisions of "amd/ryzen 5/pro 1600"

	Edit Values
	Ryzen 5 PRO 1600
	General Info
Designer	AMD
Manufacturer	GlobalFoundries
Model Number	PRO 1600
Part Number	YD160BBBM6IAE
Market	Desktop
Introduction	June 29, 2017 (announced)
Shop	Amazon
	General Specs
Family	Ryzen 5
Series	Ryzen PRO
Locked	No
Frequency	3,200 MHz
Turbo Frequency	3,600 MHz (1 core),; 3,600 MHz (2 cores),; 3,300 MHz (3 cores),; 3,300 MHz (4 cores),; 3,300 MHz (5 cores),; 3,300 MHz (6 cores)
Bus rate	4 × 8 GT/s
Clock multiplier	32
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Zen
Chipset	Promontory
Core Name	Summit Ridge
Core Family	23
Core Model	1
Core Stepping	B1
Process	14 nm
Transistors	4,800,000,000
Technology	CMOS
Die	213 mm²
Word Size	64 bit
Cores	6
Threads	12
Max Memory	64 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
TDP	65 W
	Packaging
Package	OPGA-1331
Package Type	Organic Micro Pin Grid Array
Dimension	40 mm × 40 mm
Pitch	1 mm
Contacts	1331
Socket	Socket AM4

Latest revision as of 22:55, 25 March 2023

Ryzen 5 PRO 1600 is a 64-bit hexa-core mid-range performance x86 workstation microprocessor introduced by AMD in mid-2017. This processor is based on AMD's Zen microarchitecture and is fabricated on a 14 nm process. The PRO 1600 operates at a base frequency of 3.2 GHz with a TDP of 65 W and a Boost frequency of up to 3.6 GHz. This MPU supports up to 64 GiB of dual-channel DDR4-2666 ECC memory.

Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache[edit]

Main article: Zen § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

576 KiB

589,824 B
0.563 MiB

L1I$	384 KiB 393,216 B 0.375 MiB	6x64 KiB	4-way set associative
L1D$	192 KiB 196,608 B 0.188 MiB	6x32 KiB	8-way set associative	write-back

L2$

3 MiB

3,072 KiB
3,145,728 B
0.00293 GiB

		6x512 KiB	8-way set associative	write-back

L3$

16 MiB

16,384 KiB
16,777,216 B
0.0156 GiB

		2x8 MiB	16-way set associative

Memory controller[edit]

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR4-2666
Supports ECC	Yes
Max Mem	64 GiB
Controllers	2
Channels	2
Max Bandwidth	39.74 GiB/s 40,693.76 MiB/s 42.671 GB/s 42,670.5 MB/s 0.0388 TiB/s 0.0427 TB/s
Bandwidth	Single 19.87 GiB/s Double 39.74 GiB/s

[Edit] Memory Configurations
Dual Channel	Single Rank	2 DIMMs	DDR4-2666
	Single Rank	4 DIMMs	DDR4-2133
	Double Rank	2 DIMMs	DDR4-2400
	Double Rank	4 DIMMs	DDR4-1866

Expansions[edit]

This processors has 20 PCIe lanes: 16 for a DGP and 4 for storage (NVMe or 2 ports SATA Express).

[Edit/Modify Expansions Info]

Expansion Options

PCIe

Revision	3.0
Max Lanes	20
Configs	1x16+1x4

USB

Revision	3.0, 2.0
Ports	4
Rate	5 Gbit/s

UART

Ports	4

SATA

Revision	3.0
Ports	4

GP I/O	6 ports

eMMC, LPC, SMBus, SPI/eSPI

Audio[edit]

Support Azalia High Definition Audio

Graphics[edit]

This processor has no integrated graphics.

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
SSE4a	Streaming SIMD Extensions 4a
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
RdRand	Hardware RNG
SHA	SHA Extensions
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
SMT	Simultaneous Multithreading
AMD-Vi	AMD-Vi (I/O MMU virtualization)
AMD-V	AMD Virtualization
TSME	Transparent SME
SenseMI	SenseMI Technology
Boost	Precision Boost

This model has partial XFR support, allowing for an additional +100
100 MHz
0.1 GHz
100,000 kHz
MHz boost frequency.

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Ryzen 5 PRO 1600 - AMD#io +
amd xfr headroom	100 MHz (0.1 GHz, 100,000 kHz) +
base frequency	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
chipset	Promontory +
clock multiplier	32 +
core count	6 +
core family	23 +
core model	1 +
core name	Summit Ridge +
core stepping	B1 +
designer	AMD +
die area	213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
family	Ryzen 5 +
first announced	June 29, 2017 +
full page name	amd/ryzen 5/pro 1600 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has amd amd-v technology	true +
has amd amd-vi technology	true +
has amd precision boost	true +
has amd sensemi technology	true +
has amd transparent secure memory encryption technology	true +
has ecc memory support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology + and Precision Boost +
has locked clock multiplier	false +
has simultaneous multithreading	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	576 KiB (589,824 B, 0.563 MiB) +
l1d$ description	8-way set associative +
l1d$ size	192 KiB (196,608 B, 0.188 MiB) +
l1i$ description	4-way set associative +
l1i$ size	384 KiB (393,216 B, 0.375 MiB) +
l2$ description	8-way set associative +
l2$ size	3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
l3$ description	16-way set associative +
l3$ size	16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
ldate	3000 +
manufacturer	GlobalFoundries +
market segment	Desktop +
max cpu count	1 +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	39.74 GiB/s (40,693.76 MiB/s, 42.671 GB/s, 42,670.5 MB/s, 0.0388 TiB/s, 0.0427 TB/s) +
max memory channels	2 +
max pcie lanes	20 +
microarchitecture	Zen +
model number	PRO 1600 +
name	Ryzen 5 PRO 1600 +
package	OPGA-1331 +
part number	YD160BBBM6IAE +
process	14 nm (0.014 μm, 1.4e-5 mm) +
series	Ryzen PRO +
smp max ways	1 +
socket	Socket AM4 +
supported memory type	DDR4-2666 +
tdp	65 W (65,000 mW, 0.0872 hp, 0.065 kW) +
technology	CMOS +
thread count	12 +
transistor count	4,800,000,000 +
turbo frequency (1 core)	3,600 MHz (3.6 GHz, 3,600,000 kHz) +
turbo frequency (2 cores)	3,600 MHz (3.6 GHz, 3,600,000 kHz) +
turbo frequency (3 cores)	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
turbo frequency (4 cores)	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
turbo frequency (5 cores)	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
turbo frequency (6 cores)	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas