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Difference between revisions of "amd/duron/dhd950amt1b"
< amd‎ | duron

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{{amd title|Duron 950 (Morgan)}}
 
{{amd title|Duron 950 (Morgan)}}
{{mpu
+
{{chip
 
| name                = Duron 950
 
| name                = Duron 950
 
| no image            = Yes
 
| no image            = Yes
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| model number        = Duron 950
 
| model number        = Duron 950
 
| part number        = DHD950AMT1B
 
| part number        = DHD950AMT1B
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Desktop
 
| market              = Desktop
 
| first announced    = July 12, 2001
 
| first announced    = July 12, 2001
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| max memory          = 4 GiB
 
| max memory          = 4 GiB
  
| electrical          = Yes
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| power              =  
 
| power              =  
 
| v core              = 1.75 V
 
| v core              = 1.75 V
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== Features ==  
 
== Features ==  
{{mpu features
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{{x86 features
 
| em64t      =  
 
| em64t      =  
 
| nx          =  
 
| nx          =  

Latest revision as of 15:07, 13 December 2017

Edit Values
Duron 950
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 950
Part NumberDHD950AMT1B
MarketDesktop
IntroductionJuly 12, 2001 (announced)
July 12, 2001 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Desktop
LockedYes
Frequency950 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier9.5
CPUID670
Microarchitecture
MicroarchitectureK7
Core NameMorgan
Core Family6
Core Model7
Core Stepping0
Process180 nm
Transistors25,180,000
TechnologyCMOS
Die105.68 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.75 V ± 0.15 V
TDP44.4 W
Tcase0 °C – 90 °C
Tstorage-40 °C – 100 °C

The Duron 950 based on the Morgan core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 950 MHz with a bus capable of 200 MT/s with a max TDP of 44.4 W and a typical TDP of 40.8 W.

Cache[edit]

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
  • Halt State
  • Sleep State

Documents[edit]

DataSheet[edit]

Other[edit]


See also[edit]

has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +